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KSZ8995FQI Datasheet, PDF (15/89 Pages) Micrel Semiconductor – Integrated 5-Port 10/100 Managed Switch
Micrel, Inc.
KS8995MA/FQ
Pin Description − By Numbers (Continued)
Pin Number
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
Pin Name
VDDAR
RXP5
RXM5
GNDA
TXP5
TXM5
VDDAT
FXSD5/FXSD3
FXSD4
GNDA
VDDAR
GNDA
VDDAR
GNDA
MUX1
Type(1)
P
I
I
GND
O
O
P
Ipd
Ipd
GND
P
GND
P
GND
NC
Port
5
5
5
5
5/3
4
Pin Function
1.8V analog VDD.
Physical receive signal + (differential).
Physical receive signal – (differential).
Analog ground.
Physical transmit signal + (differential).
Physical transmit signal – (differential).
3.3V analog VDD. (2.5V or 3.3V is for B3 and previous chip revision)
Fiber signal detect pin. FXSD5 is for port 5 of the KS8995MA. FXSD3 is for port 3
of the KS8995FQ
Fiber signal detect pin for port 4.
Analog ground.
1.8V analog VDD.
Analog ground.
1.8V analog VDD.
Analog ground.
Factory test pins. MUX1 and MUX2 should be left unconnected for normal
operation.
46
MUX2
NC
Mode
MUX1
Normal Operation
NC
47
PWRDN_N
Ipu
Full-chip power down. Active low.
48
RESERVE
NC
Reserved pin. No connect.
49
GNDD
GND
Digital ground.
50
VDDC
P
1.8V digital core VDD.
51
PMTXEN
Ipd
5 PHY[5] MII transmit enable.
52
PMTXD3
Ipd
5 PHY[5] MII transmit bit 3.
53
PMTXD2
Ipd
5 PHY[5] MII transmit bit 2.
54
PMTXD1
Ipd
5 PHY[5] MII transmit bit 1.
55
PMTXD0
Ipd
5 PHY[5] MII transmit bit 0.
56
PMTXER
Ipd
5 PHY[5] MII transmit error.
57
PMTXC
O
5 PHY[5] MII transmit clock. PHY mode MII.
58
GNDD
GND
Digital ground.
59
VDDIO
P
3.3V digital VDD for digital I/O circuitry.
60
PMRXC
O
5 PHY[5] MII receive clock. PHY mode MII.
MUX2
NC
Note:
1.
P = Power supply.
I = Input.
O = Output.
I/O = Bidirectional.
GND = Ground.
Ipu = Input w/internal pull-up.
Ipd = Input w/internal pull-down.
Ipd/O = Input w/internal pull-down during reset, output pin otherwise.
Ipu/O = Input w/internal pull-up during reset, output pin otherwise.
NC = No connect.
October 2011
15
M9999-102611-3.0