MIC2873 Datasheet, PDF (14/24 Pages) Micrel Semiconductor – 1.2A High-Brightness Flash LED Driver with Single-Wire Serial Interface

Micrel, Inc.
MIC2873
After receiving the stop sequence, the internal registers
decode and update cycle is started, with the shadow
register values being transferred to the decoder. Figure 4
shows an example of entering a write of data 5 to Address
3.
ADDRESS/DATA FRAME
START
LATCH START
LATCH
END
REGISTER
WRITE
0123
TLAT
< TEND
012345
TLAT
> TEND
Figure 4. Communication Timing Example of Entering Write
for Data 5 to Address 3
Only correctly formatted address/data combination will be
treated as a valid frame and processed by the MIC2873.
Any other input, such as a single data word followed by
T_END, or three successive data words will be discarded by
the target hardware as an erroneous entry. Additionally,
any register write to either an invalid register or with invalid
register data will also be discarded.
MIC2873 Registers
The MIC2873 supports five writeable registers for
controlling the torch and the flash modes of operation as
shown in Table 2. Note that register addressing starts at 1.
Writing any value above the maximum value shown for
each registers will cause an invalid data error and the
frame will be discarded.
Table 2. Five Writable Registers of MIC2873
Address
Name
Max.
Value
Description
1
FEN/FCUR 31
Flash Enable/Current
2
TEN/TCUR 31
Torch Enable/Current
3
STDUR
7
Safety Timer Duration
4
LB_TH
9
Low-Battery Voltage
Detection Threshold
5
ST_TH
5
Safety Timer Threshold
Flash Current Register (FEN/FCUR: default 0)
The flash current register enables and sets the flash mode
current level. Valid values are 0 to 31; values 0-15 will set
the flash current without enabling the flash (such that it can
be triggered externally), values 16-31 will set the flash
current and enable the flash. The flash current register
maps into the internal FEN and FCUR registers as shown
in the table below. Table 3 describes the relationship
between the flash current, and the FCUR register setting.
Table 3. Flash Current Register Mapping into Internal FEN
plus FCUR Registers and Relationship between Flash
Current and the FCUR Register Setting
Dec.
FEN/FCUR[4:0] Value
Binary FEN[4] FCUR[3:0]
IFLASH (A)
0
00000
0
0000
1.200
1
00001
0
0001
1.150
2
00010
0
0010
1.100
3
00011
0
0011
1.050
4
00100
0
0100
1.000
5
00101
0
0101
0.950
6
00110
0
0110
0.900
7
00111
0
0111
0.850
8
01000
0
1000
0.800
9
01001
0
1001
0.750
10 01010
0
1010
0.700
11 01011
0
1011
0.650
12 01100
0
1100
0.600
13 01101
0
1101
0.550
14 01110
0
1110
0.400
15 01111
0
1111
0.250
16 10000
1
0000
1.200
17 10001
1
0001
1.150
18 10010
1
0010
1.100
19 10011
1
0011
1.050
20 10100
1
0100
1.000
21 10101
1
0101
0.950
22 10110
1
0110
0.900
23 10111
1
0111
0.850
24 11000
1
1000
0.800
25 11001
1
1001
0.750
26 11010
1
1010
0.700
27 11011
1
1011
0.650
28 11100
1
1100
0.600
29 11101
1
1101
0.550
30 11110
1
1110
0.400
31 11111
1
1111
0.250
July 17, 2014
14
Revision 1.0