MIC2827 Datasheet, PDF (14/27 Pages) Micrel Semiconductor – Triple Output PMIC with HyperLight Load™ DCDC, two LDOs, and I2C Control

Micrel, Inc.
Fault Handling
A fault is generated from either a thermal shutdown or
under-voltage lockout event. If a fault occurs, the
activation of the fault condition immediately turns off all
output supplies, sets the fault flag bit(s) in the Status
Register, and loads default values in the Enable and
Voltage Registers. The sequence Control bit SEQ CNT
is cleared to enable sequencing for sequence-enabled
parts. The POAF bit is unaffected.
The default state of the Enable Register’s POAF (Power
On After Fault) bit is high, indicating that the MIC2827
will perform a default start up when the fault goes away.
If the user instead prefers that the part does not
automatically attempt re-start after a fault, the POAF can
be programmed to a “0”.
The EN pin can be toggled high-to-low at any time to
clear the supply enables in the Enable Register and shut
down the part. The same can be achieved through I²C at
any time by disabling all enables in the enable register.
Either method can be used to shut down the part during
a fault.
Shutdown after a fault will maintain the fault flags in the
status register. Only Power-on-Reset or an echo reset of
the status register will clear these flags.
Thermal Shutdown (TSD)
If the MIC2827’s on-chip thermal shutdown detects that
the die is too hot, the part will immediately turn off all
outputs but maintain the bias to internal circuitry. The
thermal event is logged in the Status register which can
be read via I²C. When the thermal shutdown event is
removed, a default startup is executed if POAF is high.
Under Voltage Lock Out (UVLO)
If the MIC2827’s on-chip voltage monitor detects a low
voltage on the DVIN supply, the part will immediately
turn off all outputs but maintain the bias to internal
circuitry. When the UVLO event is removed, the outputs
will turn on using the default startup if POAF is high.
The UVLO event is logged in the status register which
can be read via I²C.
If the power on DVIN drops too low, the MIC2827 will no
longer be able to function reliably and will enter its
power-on reset (POR) state. Any previously raised TSD
or UVLO flags will now be cleared at startup
Power Good Indication and Hysteresis
The status of all three outputs can be read via I²C in the
status register. A register flag is set for each output
when it reaches 90% of its regulated value and cleared
when the output falls to about 85%.
MIC2827
Interrupt Operation
If interrupts are enabled (INT-EN = 1), then the
MIC2827’s IRQb output will be asserted (driven low)
whenever either of the two fault bits, UVLO or TSD, are
asserted. Clearing the fault status bit by writing a one to
it will clear the interrupt if the fault condition is no longer
present. If the fault is still present, the status bit will be
asserted again, together with the IRQb output. This
operation does not depend on the state of the POAF bit.
The default state of the INT_EN bit is zero, so the
interrupt output is disabled. This is done so that the
interrupt pin does not transition in MIC2827 systems
which use only the EN pin and not the I²C interface.
Ensuring Clean Switching in Sequence-Enabled
Parts
In no-sequence parts, no sequencing ever occurs, and
no special rules are required. However, in sequence-
enabled parts, care must be taken when using automatic
supply startup sequencing.
The sequence-enabled MIC2827 accomplishes supply
sequencing by asynchronously using one supply’s power
good signal to enable the next supply in line. As a
consequence “downstream” supplies can momentarily
switch off their outputs when “upstream” supplies are
switched in and out of the sequencing chain.
Example:
Suppose the sequence [DC, 1, 2] is enabled and LDO1
is off, the others are enabled and their status is valid. If
LDO1 is now enabled through I²C, LDO2 will turn
momentarily off, until LDO1 is valid, which then starts
LDO2.
To avoid this, the following rules should be observed,
which apply only to sequence-enabled parts:
1. If all supplies are to be turned on, it is fine to use
sequencing. This is what happens naturally as part
of the EN-initiated default startup. It may also be
accomplished by setting all three supply enables
simultaneously in the Enable Register, and leaving
the Sequence Control bit low to permit
sequencing.
2. When starting from an all-off condition and a
subset of the supplies is to be turned on,
sequencing is permitted.
3. When one or more supplies are on, and a supply
is to be turned off or on, sequencing must be
disabled by setting SEQ CNT high.
4. When a subset of the supplies has been turned on
via the Enable Register, an active transition on the
EN pin must not be used to turn on the remaining
supplies.
July 2009
14
M9999-072709-A