MIC2185_05 Datasheet, PDF (14/15 Pages) Micrel Semiconductor – Low Voltage Synchronous Boost PWM Control IC

MIC2185
• Use a ferrite material for the inductor core, which
has less core loss than an MPP or iron power
core.
The significant contributors to power loss at higher output
loads are (in approximate order of magnitude):
• Resistive on-time losses in both MOSFETs
• Switching transition losses in the low side MOS-
FET
• Inductor resistive losses
• Current sense resistor losses
• Output capacitor resistive losses (due to the
capacitor’s ESR)
To minimize power loss under heavy loads:
• Use logic level, low on-resistance MOSFETs.
Multiplying the gate charge by the on-resistance
gives a figure of merit, providing a good balance
between switching and resistive power dissipa-
tion.
• Slow transition times and oscillations on the
voltage and current waveforms dissipate more
power during the turn-on and turn-off of the
low side MOSFET. A clean layout will minimize
parasitic inductance and capacitance in the gate
drive and high current paths. This will allow the
fastest transition times and waveforms without
oscillations. Low gate charge MOSFETs will
switch faster than those with higher gate charge
specifications.
• For the same size inductor, a lower value will
have fewer turns and therefore, lower winding
resistance. However, using too small of a value
will increase the inductor current and therefore
require more output capacitors to filter the output
ripple.
• Lowering the current sense resistor value will
decrease the power dissipated in the resistor.
However, it will also increase the overcurrent
limit and may require larger MOSFETs and
inductor components to handle the higher cur-
rents.
• Use low ESR output capacitors to minimize the
power dissipated in the capacitor’s ESR.
MIC2185
14
Micrel, Inc.
October 2005