MIC2874 Datasheet, PDF (13/22 Pages) Micrel Semiconductor – 1.2A High-Brightness Flash LED Driver with Single-Wire Serial Interface

Micrel, Inc.
MIC2874
Idle States and Error Conditions
In shutdown mode, the MIC2874 is in a reset condition
with all functions off while consuming minimal power.
Register settings are reset to default state when coming
out of shutdown state. In idle mode, all register settings
persist and all MIC2874 functions continue in their current
state. Table 1 summarises the difference between the two
idle modes:
Communication Details
The serial interface requires delimiters to indicate the start
of frame, data as a series of pulses, and end of frame
indicated by a lack of activity for longer than T_LAT. The
start of frame is the first high to low transition of DC when
in idle mode. The first rising edge resets the internal data
counter to 0.
Table 1. Differences between Idle Modes
Mode
Shutdown
V_DC
I_SUPPLY
(all functions off)
Low
1μA
Register State
Default
Start-Up Time
1μs
Idle
High
230μA
Persist
100ns
Idle mode is entered automatically at the end of a
communication frame by holding DC high for ≥T_END, by
enabling the device by bringing DC high when in shutdown
mode, or when an error is detected by the single-wire
interface logic.
Shutdown mode can be entered at any time by pulling
down DC for ≥T_END, discarding any current communication
and resetting the internal registers. If a communication is
received before the shutdown period but after the T_LAT
period, the communication is discarded. This state is also
used to create an internal error state to avoid erroneously
latching data where the communication process cannot be
serviced in time. Additionally, each register has a
maximum value associated with it. If the number of bits
clocked in exceeds the maximum value for the register, the
data is assumed to be in error and the data is discarded.
Figure 3. Data Word Pulse Timing
A pulse is delimited by the signal first going below V_L and
then above V_H within the latch timeout T_LAT. During this
transition, minimum on (T_ON) and off (T_OFF) periods are
observed to improve tolerance to glitches. Each rising
edge increments the internal data register. Data is
automatically latched into internal shadow address or data
registers after an inactivity period of DC remaining high for
longer than T_LAT.
To send register write commands, the address and data
are entered in series as two data words using the above
pattern, with the second word starting after the first latch
period has expired. After the second word is entered, the
IDLE command should be issued by leaving the DC pin
high for ≥ T_END to indicate the stop sequence of the
address/data words frame.
After receiving the stop sequence, the internal registers
decode and update cycle is started, with the shadow
register values being transferred to the decoder. Figure 4
shows an example of entering a write of data 5 to address
3.
Figure 2. Abort, Shutdown and Idle Timing Waveforms
Figure 4. Communication Timing Example of Entering Write
for Data 5 to Address 3
Only correctly formatted address/data combination will be
treated as a valid frame and processed by the MIC2874.
Any other input, such as a single data word followed by
T_END, or three successive data words will be discarded by
the target hardware as an erroneous entry. Additionally,
any register write to either an invalid register or with invalid
register data will also be discarded.
August 26, 2014
13
Revision 1.0