MIC2199 Datasheet, PDF (13/15 Pages) Micrel Semiconductor – 300kHz 4mm × 4mm Synchronous Buck Converter

MIC2199
The input capacitor must be rated for the input current ripple.
The RMS value of input capacitor current is determined at the
maximum output current. Assuming the peak-to-peak induc-
tor ripple current is low:
I_CIN(rms)≈ I_OUT(max) × D × (1− D)
The power dissipated in the input capacitor is:
P_{DISS(CIN )} = I_CIN(rms)2 × R_{ESR(CIN )}
Voltage Setting Components
The MIC2199 requires two resistors to set the output voltage
as shown in Figure 6.
Error
Amp
R1
FB
3
R2
MIC2199
V_REF
0.8V
Figure 6. Voltage-Divider Configuration
The output voltage is determined by the equation:
V_O
=
V_REF
×
⎛
⎝⎜¹⁺
R1^⎞
R2 ⎠⎟
Where: V_REF for the MIC2199 is typically 0.8V.
A typical value of R1 can be between 3k and 10k. If R1 is too
large it may allow noise to be introduced into the voltage
feedback loop. If R1 is too small in value it will decrease the
efficiency of the power supply, especially at low output loads.
Once R1 is selected, R2 can be calculated using:
R2 = ^{VREF × R1}
V_O − V_REF
Voltage Divider Power Dissipation
The reference voltage and R2 set the current through the
voltage divider.
I_DIVIDER
=
V_REF
R2
The power dissipated by the divider resistors is:
2
P_DIVIDER = (R1+ R2) × I_DIVIDER
Efficiency Calculation and Considerations
Efficiency is the ratio of output power to input power. The
difference is dissipated as heat in the buck converter. Under
light output load, the significant contributors are:
Micrel
• Supply current to the MIC2199
• MOSFET gate-charge power (included in the IC
supply current)
• Core losses in the output inductor
To maximize efficiency at light loads:
• Use a low gate-charge MOSFET or use the small-
est MOSFET, which is still adequate for maximum
output current.
• Use a ferrite material for the inductor core, which
has less core loss than an MPP or iron power core.
Under heavy output loads the significant contributors to
power loss are (in approximate order of magnitude):
• Resistive on-time losses in the MOSFETs
• Switching transition losses in the MOSFETs
• Inductor resistive losses
• Current-sense resistor losses
• Input capacitor resistive losses (due to the capaci-
tors ESR)
To minimize power loss under heavy loads:
• Use logic-level, low on-resistance MOSFETs. Mul-
tiplying the gate charge by the on-resistance gives
a figure of merit, providing a good balance be-
tween low and high load efficiency.
• Slow transition times and oscillations on the volt-
age and current waveforms dissipate more power
during turn-on and turnoff of the MOSFETs. A
clean layout will minimize parasitic inductance and
capacitance in the gate drive and high current
paths. This will allow the fastest transition times
and waveforms without oscillations. Low gate-
charge MOSFETs will transition faster than those
with higher gate-charge requirements.
• For the same size inductor, a lower value will have
fewer turns and therefore, lower winding resis-
tance. However, using too small of a value will
require more output capacitors to filter the output
ripple, which will force a smaller bandwidth, slower
transient response and possible instability under
certain conditions.
• Lowering the current-sense resistor value will de-
crease the power dissipated in the resistor. How-
ever, it will also increase the overcurrent limit and
will require larger MOSFETs and inductor compo-
nents.
• Use low-ESR input capacitors to minimize the
power dissipated in the capacitors ESR.
November 2004
13
MIC2199