MIC2164_10 Datasheet, PDF (13/39 Pages) Micrel Semiconductor – Synchronous Buck Controllers Featuring Adaptive On-Time Control 28V Input, Constant Frequency

Micrel, Inc.
Functional Description
The MIC2164/-2/-3 is an adaptive on-time synchronous
buck controller family built for low cost and high
performance. They are designed for a wide input voltage
range from 3V to 28V and for high output power buck
converters. An estimated-ON-time method is applied in
MIC2164/-2/-3 to obtain a constant switching frequency
and to simplify the control compensation. The over-
current protection is implemented without the use of an
external sense resistor. It includes an internal soft-start
function which reduces the power supply input surge
current at start-up by controlling the output voltage rise
time.
Theory of Operation
The MIC2164/-2/-3 is a adaptive on-time buck controller
family. Figure 1 illustrates the block diagram for the
control loop. The output voltage variation will be sensed
by the MIC2164/-2/-3 feedback pin FB via the voltage
divider R1 and R2, and compared to a 0.8V reference
voltage V_REF at the error comparator through a low gain
transconductance (g_m) amplifier, the amplifier improves
the MIC2164/-2/-3 converter output voltage regulation. If
the FB voltage decreases and the output of the g_m
amplifier is below 0.8V, The error comparator will trigger
the control logic and generate an ON-time period, in
which DH pin is logic high and DL pin is logic low. The
ON-time period length is predetermined by the “FIXED
T_ON ESTIMATION” circuitry:
T_{ON(estimated)}
=
V_OUT
V_HSD × f_sw
(1)
where V_OUT is the output voltage, V_HSD is the power
stage input voltage, and f_SW is the switching frequency
(300kHz for MIC2164, 600kHz for MIC2164-2, and
1MHz for MIC2164-3).
After ON-time period, the MIC2164/-2/-3 goes into the
OFF-time period, in which DH pin is logic low and DL pin
is logic high. The OFF-time period length is depending
on the FB voltage in most cases. When the FB voltage
decreases and the output of the g_m amplifier is below
0.8V, then the ON-time period is trigger and the OFF-
time period ends. If the OFF-time period decided by the
FB voltage is less than the minimum OFF time T_OFF(min),
which is about 363ns typical, then the MIC2164/-2/-3
control logic will apply the T_OFF(min) instead. T_OFF(min) is
required by the BST charging.
MIC2164/-2/-3/C
The maximum duty cycle is obtained from the 363ns
T_OFF(min):
Dmax = ^{TS − TOFF(min)} = 1 − ^363ns
T_S
T_S
where Ts = 1/f_SW.
It is not recommended to use MIC2164/-2/-3 with a OFF
time close to T_OFF(min) at the steady state. Also, as V_OUT
increases, the internal ripple injection will increase and
reduce the line regulation performance. Therefore, the
maximum output voltage of the MIC2164/-2/-3 should be
limited to 5.5V. If a higher output voltage is required, use
the MIC2176 instead. Please refer to “Setting Output
Voltage” subsection in “Application Information” for more
details.
The estimated-ON-time method results in a constant
switching frequency in MIC2164/-2/-3. The actual ON
time is varied with the different rising and falling time of
the external MOSFETs. Therefore, the type of the
external MOSFETs, the output load current, and the
control circuitry power supply V_IN will modify the actual
ON time and the switching frequency. Also, the minimum
T_ON results in a lower switching frequency in the high
V_HSD and low V_OUT applications, such as 24V to 1.0V
MIC2164-3 application. The minimum T_ON measured on
the MIC2164 evaluation board is about 138ns. During
the load transient, the switching frequency is changed
due to the varying OFF time.
To illustrate the control loop, the steady-state scenario
and the load transient scenario are analyzed. For easy
analysis, the gain of the g_m amplifier is assumed to be 1.
With this assumption, the inverting input of the error
comparator is the same as the FB voltage. Figure 2
shows the MIC2164/-2/-3 control loop timing during the
steady-state. During the steady-state, the g_m amplifier
senses the FB voltage ripple, which is proportional to the
output voltage ripple and the inductor current ripple, to
trigger the ON-time period. The ON time is
predetermined by the estimation. The ending of OFF
time is controlled by the FB voltage. At the valley of the
FB voltage ripple, which is below than V_REF, OFF period
ends and the next ON-time period is triggered through
the control logic circuitry.
September 2010
13
M9999-091310-D