MIC4680_08 Datasheet, PDF (12/15 Pages) Micrel Semiconductor – 1A 200kHz SuperSwitcher Buck Regulator

Micrel, Inc.
P_D
= ^POUT
η
− P_OUT
P_D
=
5W
0.79
− 5W
P_D = 1.33W
Calculate the worst-case junction temperature:
T_J = P_D(IC)θ_JC + (T_C – T_A) + T_A(max)
where:
T_J = MIC4680 junction temperature
P_D(IC) = MIC4680 power dissipation
θ_JC = junction-to-case thermal resistance.
The θ_JC for the MIC4680’s power-SOIC-8
is approximately 20°C/W. (Also see Figure
1.)
T_C = “pin” temperature measurement taken at
the entry point of pins 6 or 7 into the
plastic package at the ambient
temperature (T_A) at which T_C is measured.
T_A = ambient temperature at which T_C is
measured.
T_A(max) = maximum ambient operating temp. for
the specific design.
Calculating the maximum junction temperature given a
maximum ambient temperature of 65°C:
TJ = 1.064 × 20°C/W + (45°C – 25°C) + 65°C
TJ = 106.3°C
This value is less than the allowable maximum operating
junction temperature of 125°C as listed in “Operating
Ratings.” Typical thermal shutdown is 160°C and is
listed in “Electrical Characteristics.”
Increasing the Maximum Output Current
The maximum output current at high input voltages can
be increased for a given board layout. The additional
three components shown in Figure 4 will reduce the
overall loss in the MIC4680 by about 20% at high V_IN
and high I_OUT.
Even higher output current can be achieved by using the
MIC4680 to switch an external FET. See Figure 9 for a
5A supply with current limiting.
MIC4680
Layout Considerations
Layout is very important when designing any switching
regulator. Rapidly changing switching currents through
the printed circuit board traces and stray inductance can
generate voltage transients which can cause problems.
To minimize stray inductance and ground loops, keep
trace lengths, indicated by the heavy lines in Figure 5, as
short as possible. For example, keep D1 close to pin 3
and pins 5 through 8, keep L1 away from sensitive node
FB, and keep C_IN close to pin 2 and pins 5 though 8. See
“Applications Information: Thermal Considerations” for
ground plane layout.
The feedback pin should be kept as far way from the
switching elements (usually L1 and D1) as possible.
A circuit with sample layouts is provided. See Figure 6a
through 6e.
MIC4680BM
IN
SW ³
1N4148
D1
SHDN
FB
GND
5678
2.2nF
Figure 4. Increasing Maximum Output Current
at High Input Voltages
V_IN
+4V to +34V
C_IN
Power
SOIC-8
MIC4680BM
2 _IN
SW ³
1 _SHDN
FB ⁴
GND
5678
L1
68µH
D1
V_OUT
C_OUT R1
R2
GND
Figure 5. Critical Traces for Layout
J1
V_IN
4V to +34V
C1
15µF
35V
J3
GND
C2
0.1µF
OFF
50V
ON
S1
NKK G12AP
U1 MIC4680BM
2 _IN
SW ³
1 _SHDN
FB ⁴
GND
SOIC-8
5–8
* C3 can be used to provide additional stability
and improved transient response.
L1
68µH
R1
3.01k
C3*
optional
D1
B260A
or
SS26
R6
optional
1
2
R2
6.49k
3
JP1a
1.8V
4
R3
2.94k
5
JP1b
2.5V
6
R4
1.78k
7
JP1c
3.3V
8
R5
JP1d
5.0V
Figure 6a. Evaluation Board Schematic Diagram
March 2008
12
C4
220µF
10V
J2
V_OUT
1A
C5
0.1µF
50V
J4
GND
M9999-032808