MIC33163 Datasheet, PDF (12/19 Pages) Micrel Semiconductor – Buck Regulator with Integrated Inductor

Micrel, Inc.
Functional Description
PVIN
The input supply (PV_IN) provides power to the internal
MOSFETs for the switch-mode regulator. The PV_IN
operating input voltage range of 2.7V to 5.5V so an input
capacitor, with a minimum voltage rating of 6.3V, is
recommended. Due to the high switching speed, a
minimum 2.2µF bypass capacitor placed close to PV_IN
and the power ground (PGND) pin is required. Refer to
the PCB Layout Recommendations section for details.
AVIN
Analog VIN (AV_IN) provides power to the internal control
and analog supply circuitry. AVIN must be tied to PVIN.
Careful layout should be considered to ensure that any
high-frequency switching noise caused by PVIN is
reduced before reaching AVIN. A 1µF capacitor as close
as to AVIN as possible is recommended. Refer to the
PCB Layout Recommendations section for details.
EN/Shutdown
A logic high signal on the enable pin activates the output
voltage of the device. A logic low signal on the enable pin
deactivates the output and reduces supply current to
0.1µA. When disabled the MIC33164 switches an internal
load of 180Ω on the regulators switch node to discharge
the output. The MIC33163/4 features external soft-start
circuitry adjusted by the soft start (SS) pin, which reduces
in-rush current and prevents the output voltage from
overshooting at start up. Do not leave the EN pin floating.
SW
The switch (SW) connects to the controller end of
integrated inductor. The other end of the inductor is
connected to VOUT pin. Due to the high-speed switching
on this pin, the switch node should be not be connected.
VOUT
The output pin (VOUT) connects to the output of
integrated inductor. The output capacitor should be
connected from this pin to PGND as close to the module
as possible. The MIC33163/4 is rated for an output
current of up to 1A. A 22µF capacitor is recommended for
best performance. Refer to the PCB Layout
Recommendations section for details.
AGND
The analog ground (AGND) is the ground path for the
biasing and control circuitry. The current loop for the
signal ground should be separate from the power ground
(PGND) loop. Refer to the PCB Layout
Recommendations section for details.
MIC33163/4
PGND
The power ground (PGND) pin is the ground path for the
high current in PWM mode. The current loop for the
power ground should be as small as possible and
separate from the analog ground (AGND) loop as
applicable. Refer to the PCB Layout Recommendations
section for details.
PG
The power good (PG) pin is an open drain output which
indicates logic high when the output voltage is typically
above 90% of its steady state voltage. A pull-up resistor
of more than 5kΩ should be connected from PG to V_OUT.
SS
The soft-start (SS) pin is used to control the output
voltage ramp-up time. Setting C_SS to 1nF sets the start-up
time to the recommended minimum of approximately
575µs. The start-up time can be determined by Equation
1:
T_SS = 250 × 10³ × ln(10) × C_SS
Eq. 1
The action of the soft-start capacitor is to control the rise
time of the internal reference voltage between 0% and
100% of its nominal steady state value.
FB
This is the control input for programming the output
voltage. A resistor divider network is connected to this pin
from the output and is compared to the internal 0.7V
reference within the regulation loop.
May 22, 2014
12
Revision 1.1