MIC23155 Datasheet, PDF (11/19 Pages) Micrel Semiconductor – 3MHz PWM 2A Buck Regulator with HyperLight Load and Power Good

Micrel Inc.
Functional Description
VIN
The input supply (VIN) provides power to the internal
MOSFETs for the switch mode regulator along with the
internal control circuitry. The VIN operating range is 2.7V
to 5.5V. An input capacitor with a minimum voltage
rating of 6.3V is recommended. Due to the high
switching speed, a minimum 2.2µF bypass capacitor
placed close to VIN and the power ground (PGND) pin is
required. Refer to the layout recommendations for
details.
EN
A logic high signal on the enable pin activates the output
voltage of the device. A logic low signal on the enable
pin deactivates the output and reduces supply current to
0.01µA. MIC23155 features external soft start circuitry
via the SS pin that reduces inrush current and prevents
the output voltage from overshooting at start up. Do not
leave the EN pin floating.
SW
The switch (SW) connects directly to one end of the
inductor and provides the current path during switching
cycles. The other end of the inductor is connected to the
load, SNS pin, and output capacitor. Due to the high
speed switching on this pin, the switch node should be
routed away from sensitive nodes whenever possible.
SNS
The sense (SNS) pin is connected to the output of the
device to provide feedback to the control circuitry. The
SNS connection should be placed close to the output
capacitor. Refer to the layout recommendations for more
details. The SNS pin also provides the output active
discharge circuit path to pull down the output voltage
when the device is disabled.
AGND
The analog ground (AGND) is the ground path for the
biasing and control circuitry. The current loop for the
signal ground should be separate from the power ground
(PGND) loop. Refer to the layout recommendations for
more details.
MIC23155
PGND
The power ground pin is the ground path for the high
current in PWM mode. The current loop for the power
ground should be as small as possible and separate
from the analog ground (AGND) loop as applicable.
Refer to the layout recommendations for more details.
PG
The power good (PG) pin is an open drain output which
indicates when the output voltage is within regulation.
This is indicated by a logic high signal when the output
voltage is above the PG threshold. Connect a pull up
resistor greater than 5kΩ from PG to V_OUT.
SS
The SS pin is used to control the output voltage ramp up
time. The approximate equation for the ramp time in
milliseconds is 270x10³ x ln(10) x C_SS. For example, for
a C_SS = 470pF, T_RISE ≈ 300µs. Refer to the “V_OUT Rise
Time vs. C_SS” graph in the Typical Characteristics
section. The minimum recommended value for C_SS is
200pF.
FB
The feedback (FB) pin is provided for the adjustable
voltage option. This is the control input for setting the
output voltage. A resistor divider network is connected to
this pin from the output and is compared to the internal
0.62V reference within the regulation loop.
The output voltage can be calculated using the following
equation:
V_OUT
=
V_REF
⋅ ⎜⎛1 + ^R1 ⎟⎞
⎝ ^R2 ⎠
Recommended feedback resistor values:
V_OUT
1.2V
R1
274k
1.5V
316k
1.8V
301k
2.5V
324k
3.3V
309k
R2
294k
221k
158k
107k
71.5k
April 2011
11
M9999-041811-A