MIC2166 Datasheet, PDF (11/26 Pages) Micrel Semiconductor – Adaptive On-Time DC-DC Controller

Micrel, Inc.
MIC2166
Figure 3. MIC2166 Load-Transient Response
Unlike in current-mode control, the MIC2166 uses the
output voltage ripple, which is proportional to the
inductor current ripple if the ESR of the output capacitor
is large enough, to trigger an ON-time period. The
predetermined ON-time makes MIC2166 control loop
have the advantage of constant ON-time mode control
and eliminates the need for slope compensation.
The MIC2166 has its own stability concern: V_FB ripple
should be in phase with the inductor current ripple and
large enough to be sensed by the g_m amplifier and the
error comparator. The recommended V_FB ripple is
20mV~100mV. If a low ESR output capacitor is selected,
the V_FB ripple may be too small to be sensed by the gm
amplifier and the error comparator. Also, the V_OUT ripple
and the V_FB ripple are not in phase with the inductor
current ripple if the ESR of the output capacitor is very
low. Therefore, ripple injection is required for a low ESR
output capacitor. Please refer to “Ripple Injection”
subsection in “Application Information” for more details.
Soft-Start
Soft-start reduces the power supply input surge current
at startup by controlling the output voltage rise time. The
input surge appears while the output capacitor is
charged up. A slower output rise time will draw a lower
input surge current.
The MIC2166 implements an internal digital soft-start by
making the 0.8V reference voltage V_REF ramp from 0 to
100% in about 5ms. Therefore, the output voltage is
controlled to increase slowly by a stair-case V_REF ramp.
Once the soft-start cycle ends, the related circuitry is
disabled to reduce current consumption.
Current Limit
The MIC2166 uses the R_DS(ON) of the low-side power
MOSFET to sense over-current conditions. This method
will avoid adding cost, board space and power losses
taken by discrete current sense resistors. The low-side
MOSFET is used because it displays much lower
parasitic oscillations during switching than the high-side
MOSFET.
In each switching cycle of the MIC2166 converter, the
inductor current is sensed by monitoring the low-side
MOSFET in the OFF period. The sensed voltage is
compared with a current-limit threshold voltage V_CL after
a blanking time of 150ns. If the sensed voltage is over
V_CL, which is 133mV typical at 0.8V V_FB, then the
MIC2166 turns off the high-side and low-side MOSFETs
and a soft-start sequence is triggered. This mode of
operation is called “hiccup mode” and its purpose is to
protect the downstream load in case of a hard short. The
current limit threshold V_CL has a back fold characteristic
related to the FB voltage. Please refer to the “Typical
Characteristics” for the curve of current limit threshold vs.
FB voltage percentage. The circuit in Figure 4 illustrates
the MIC2166 current limiting circuit.
Figure 4. MIC2166 Current Limiting Circuit
Using the typical V_CL value of 133mV, the current limit
value is roughly estimated as:
I_CL
≈
133mV
R_DS(ON)
For designs where the current ripple is significant
compared to the load current I_OUT, or for low duty-cycle
operation, calculating the current limit I_CL should take
into account that one is sensing the peak inductor
current and that there is a blanking delay of
approximately 150ns.
I_CL
=
133mV
R_DS(ON)
+
V_OUT × t_DLY
L
−
ΔI_L(PP)
2
(2)
ΔI_L(PP)
=
V_OUT × (1 − D)
f _SW ×L
(3)
where:
V_OUT = The output voltage
t_DLY = Current limit blanking time, 150ns typical
ΔI_L(PP) = Inductor current ripple peak-to-peak value
D = Duty Cycle
f_SW = Switching frequency
The MOSFET RDS(ON) varies between 30% to 40% with
June 2010
11
M9999-060810-B