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MIC3838_05 Datasheet, PDF (10/11 Pages) Micrel Semiconductor – Flexible Push-Pull PWM Controller
MIC3838/3839
Max ON
time
RC Pin
dead time
OscRilleastoert
RAMP Pin
OUTA
dead time
Front edge blanking
Minimum ON time
OUTB
Figure 4. Timing Diagram
Error Amplifier
The error amplifier is part of the voltage control loop of the
power supply. The FB pin is the inverting input to the error
amplifier. The non-inverting input is internally connected to a
reference voltage. The output of the error amplifier, COMP,
is connected to the PWM comparator. A voltage divider
between the error amplifier output (COMP pin) and the PWM
comparator allows the error amplifier to operate in a linear
region for better transient response. The output of the error
amplifier (COMP pin) is clamped at typically 3.65V to prevent
the COMP pin from rising up too high during startup or during
a transient condition. This feature improves the transient
response of the power supply.
Micrel
Output Drivers
OUTA and OUTB are alternating output stages, which switch
at half the oscillator frequency. A toggle flip-flop in the
MIC3838/9 guarantee both outputs will not be on at the same
time. The RC discharge time is the dead time, where both
outputs are off. This provides an adjustable non-overlap time
to prevent shoot through currents and transformer saturation
in the power supply.
The output drivers are inhibited when VDD is below the
undervoltage threshold. Internal circuitry prevents the output
drivers from glitching high when VDD is first applied to the
MIC3838/9 controller.
Decoupling and PCB Layout
PCB layout is critical to achieve reliable, stable and efficient
operation. A ground plane is required to control EMI and
minimize the inductance in power, signal and return paths.
The following guidelines should be followed to insure proper
operation of the circuit:
• Low level signal and power grounds should be kept
separate and connected at only one location, preferably
the ground pin of the control IC. The ground signals for
the current sense, voltage feedback and oscillator
should be grouped together. The return signals for the
gate drives should be grouped together and a common
connection made at the ground pin of the controller. The
low level signals and their returns must be kept separate
from the high current and high voltage power section of
the power supply.
• Avoid running sensitive traces, such as the current
sense and voltage feedback signals next to or under
power components, such as the switching FETs and
transformer.
• If a current sense resistor is used, it’s ground end must
be located very close to the ground pin of the MIC3838/9
controller. Careful PCB layout is necessary to keep the
high current levels in the current sense resistor from
running over the low level signals in the controller.
• A minimum 1µF bypass capacitor must be connected
directly between the VDD and GND pins of the
MIC3838/9. An additional 0.1µF capacitor between the
VDD end of the oscillator frequency setting resistor and
the ground end of the oscillator capacitor may be
necessary if the resistor is a distance away from the
main 1µF bypass capacitor
MIC3838/3839
10
April 2005