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SY89859U Datasheet, PDF (1/13 Pages) Micrel Semiconductor – Precision Low-Power 8:1 MUX with Internal Termination and 1:2 LVPECL Fanout Buffer | |||
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SY89859U
Precision Low-Power 8:1 MUX with Internal
Termination and 1:2 LVPECL Fanout Buffer
General Description
The SY89859U is a low jitter, low-power, high-speed
8:1 multiplexer with a 1:2 differential fanout buffer
optimized for precision telecom and enterprise server
distribution applications. The SY89859U distributes
clock frequencies from DC to >2.5GHz, and data rates
to 2.5Gbps guaranteed over temperature and voltage.
The SY89859U differential input includes Micrelâs
unique, 3-pin input termination architecture that
directly interfaces to any differential signal (AC- or
DC-coupled) as small as 100mV (200mVpp) without
level shifting or termination resistor networks in the
signal path. The outputs are 800mV, 100K-compatible
LVPECL with extremely fast rise/fall time guaranteed
to be less than 180ps.
The SY89859U features a patent-pending isolation
design that significantly improves on channel-to-
channel crosstalk-induced jitter performance.
The SY89859U operates from a 2.5V ±5% or 3.3V
±10% supply and is guaranteed over the full industrial
temperature range of â40°C to +85°C. The SY89859U
is part of Micrelâs high-speed, Precision Edge® product
line.
All support documentation can be found on
Micrelâs web site at: www.micrel.com.
Precision Edge is a registered trademark of Micrel, Inc.
MLF and MicroLeadFrame are registered trademarks of Amkor Technology.
Features
Precision Edge®
⢠Selects between 1 of 8 inputs, and provides 2
precision, low skew 100K-compatible LVPECL
output copies
⢠Low power: 150mW typ. (2.5V)
⢠Guaranteed AC performance over temperature and
voltage:
â DC to >2.5Gbps
â DC to >2.5GHz
â <690ps propagation delay
â <180ps tr/tf time
â <20ps skew (output-to-output)
⢠Unique, patent-pending channel-to-channel
isolation design provides superior crosstalk
performance
⢠Ultra-low jitter design:
â <1psRMS random jitter
â <10psPP deterministic jitter
â <10psPP total jitter (clock)
â <1psRMS cycle-to-cycle jitter
â <0.7psRMS crosstalk-induced jitter
⢠Unique, patented input termination and VT pin
accepts DC- and AC-coupled inputs (CML, PECL,
LVDS)
⢠Power supply 2.5V ±5% or 3.3V ±10%
⢠â40°C to +85°C industrial temperature range
⢠Available in 44-pin (7mm x 7mm) MLF® package
Applications
⢠Data communication systems
⢠All SONET/SDH data/clock applications
⢠All Fibre Channel applications
⢠All Gigabit Ethernet applications
Micrel Inc. ⢠2180 Fortune Drive ⢠San Jose, CA 95131 ⢠USA ⢠tel +1 (408) 944-0800 ⢠fax + 1 (408) 474-1000 ⢠http://www.micrel.com
February 2007
M9999-022007-B
hbwhelp@micrel.com or (408) 955-1690
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