SY89834U_05 Datasheet, PDF (1/10 Pages) Micrel Semiconductor – 2.5V/3.3V TWO INPUT, 1GHz LVTTL/CMOSTO-LVPECL 1:4 FANOUT BUFFER/TRANSLATOR WITH 2:1 INPUT MUX

Micrel, Inc.
2.5V/3.3V TWO INPUT, 1GHz LVTTL/CMOS-
TO-LVPECL 1:4 FANOUT BUFFER/
Precision Edge^®
Precision E^SYd⁸g⁹e^83®4U
TRANSLATOR WITH 2:1 INPUT MUX
SY89834U
FEATURES
s Selects between two LVTTL/CMOS inputs and
provides 4 LVPECL output copies
s Guaranteed AC performance over temperature
and voltage:
• DC-to >1.0GHz throughput
• <500ps propagation delay (IN-to-Q)
• < 20ps within-device skew
• < 225ps rise/fall time
s Ultra-low jitter design:
• < 1ps_RMS cycle-to-cycle jitter
• < 1ps_RMS random jitter
• < 10ps_PP deterministic jitter
• < 10ps_PP total jitter (clock)
s Low voltage 2.5V and 3.3V supply operation
s 100K LVPECL outputs
s Industrial temperature range: –40°C to +85°C
s Includes a 2:1 MUX select input
s Accepts single-ended TTL/CMOS inputs and
provides four LVPECL outputs
s Available in 16-pin (3mm × 3mm) MLF™ package
Precision Edge^®
DESCRIPTION
The SY89834U is a high-speed, 1GHz LVTTL/CMOS-to-
LVPECL fanout buffer/translator optimized for high-speed
ultra-low skew applications. The input stage is designed to
accept two single-ended LVTTL/CMOS compatible signals
that feed into a 2:1 MUX. The selected input is translated
and distributed as four differential 100K LVPECL outputs.
Within device skew is guaranteed to be less than 20ps over
supply voltage and temperature.
The single-ended input buffers accept TTL/CMOS logic
levels. The internal threshold of the buffers is defined as
V_CC/2_.
The SY89834U is a part of Micrel's high-speed Precision
Edge^® family. For applications that require a different I/O
combination, consult Micrel's website at: www.micrel.com,
and choose from a comprehensive product line of high-
speed, low-skew fanout buffers, translators and clock
generators.
APPLICATIONS
FUNCTIONAL BLOCK DIAGRAM
s Processor clock distribution/translation
s SONET clock distribution/translation
s Fibre Channel clock distribution/translation
s Gigabit Ethernet clock distribution/translation
s Single-ended ASIC-to-differential communication
IC signal translation
SEL
(LVTTL/CMOS)
1:4
Q0
/Q0
Q1
IN1
/Q1
(LVTTL/CMOS)
1
MUX
0
IN2
(LVTTL/CMOS)
EN
Q2
/Q2
DQ
LVTTL/CMOS)
Q3
/Q3
Precision Edge is a registered trademark of Micrel, Inc.
MicroLeadFrame and MLF are trademarks of Amkor Technology, Inc.
August 2005
1
M9999-080505
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