SY89828L Datasheet, PDF (1/13 Pages) Micrel Semiconductor – 3.3V 1GHz DUAL 1:10 PRECISION LVDS FANOUT BUFFER/TRANSLATOR WITH 2:1 INPUT MUX

MicreL, Inc.
3.3V 1GHz DUAL 1:10 PRECISION
LVDS FANOUT BUFFER/
Precision Edge^®
Precision E^Sd^Y8g⁹e^8®28L
SY89828L
TRANSLATOR WITH 2:1 INPUT MUX
FEATURES
s High-performance dual 1:10, 1GHz LVDS fanout
buffer/translator
s Two banks of 10 differential LVDS outputs
s Guaranteed AC parameters over temperature and
voltage:
• > 1GHz f_MAX
• < 50ps within device skew
• < 400ps t_r, t_f time
s Each bank includes a 2:1 input mux
s 2:1 mux input accepts LVDS and LVPECL
s Low jitter performance
• < 1ps_RMS cycle-to-cycle jitter
• < 1ps_PP total jitter
s 3.3V supply voltage
s Output enable function
s LVDS input includes internal 100Ω termination
s Available in a 64-Pin EPAD-TQFP
APPLICATIONS
s Enterprise networking
s High-end servers
s Communications
TYPICAL APPLICATION CIRCUIT
Precision Edge^®
DESCRIPTION
The SY89828L is a precision fanout buffer with 20
differential LVDS (Low Voltage Differential Swing) output
pairs. The part is designed for use in low voltage 3.3V
applications that require a large number of outputs to drive
precisely aligned, ultra low-skew signals to their destination.
The input is multiplexed from either LVDS or LVPECL (Low
Voltage Positive Emitter Coupled Logic) by the CLK_SEL1
and CLK_SEL2 pins. The Output Enables (OE1 and OE2)
are synchronous so that the outputs will only be enabled/
disabled when they are already in the LOW state. This
avoids any chance of generating a runt clock pulse when
the device is enabled/disabled as can happen with an
asynchronous control.
The SY89828L features a low pin-to-pin skew of less
than 50ps—performance previously unachievable in a
standard product having such a high number of outputs.
The SY89828L is available in a single space saving package,
enabling a lower overall cost solution.
Primary Clock Source
LVDS_CLKA
/LVDS_CLKA
5 ^100Ω
5
Primary
Card
Backup Clock Source
LVDS_CLKB
/LVDS_CLKB
5 ^100Ω
Redundant
5
Card
SEL1
Primary/Backup Clock Select
(Switchover with 2.0ns)
System using SY89828L as a switchover circuit from a Primary Clock to a Redundant backup Clock in a fail-safe application.
LVPECL inputs not shown in this application.
Precision Edge is a registered trademark of Micrel, Inc.
M9999-011907
[e-mail] or [phone]
1
Rev.: C Amendment: /0
Issue Date: January 2007