SY89825U Datasheet, PDF (1/8 Pages) Micrel Semiconductor – 2.5/3.3V 1:22 HIGH-PERFORMANCE, LOW-VOLTAGE PECL BUS CLOCK DRIVER & TRANSLATOR w/ INTERNAL TERMINATION

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FEATURES
s LVPECL or LVDS input to 22 LVPECL outputs
s 100K ECL compatible outputs
s LVDS input includes 100Ω termination
s Guaranteed AC parameters over voltage:
• > 2GHz f_MAX (toggle)
• < 35ps max. ch-ch skew
s Low voltage operation: 2.5V, 3.3V
s Temperature range: –40°C to +85°C
s Output enable pin
s Available in a 64-Pin EPAD-TQFP
PIN CONFIGURATION
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
VCCO
NC
NC
VCCI
LVDS_CLK
/LVDS_CLK
CLK_SEL
LVPECL_CLK
/LVPECL_CLK
GND
OE
NC
NC
/Q21
Q21
VCCO
1
48
2
47
3
46
4
45
5
44
6
43
7
64-Pin
42
8
9
10
EPAD-TQFP
(Top View)
41
40
39
11
38
12
37
13
36
14
35
15
34
16
33
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
VCCO
Q7
/Q7
Q8
/Q8
Q9
/Q9
Q10
/Q10
Q11
/Q11
Q12
/Q12
Q13
/Q13
VCCO
DESCRIPTION
The SY89825U is a High Performance Bus Clock Driver
with 22 differential LVPECL output pairs. This part is
designed for use in low voltage (2.5V, 3.3V) applications
which require a large number of outputs to drive precisely
aligned, ultra low skew signals to their destination. The
input is multiplexed from either LVDS or LVPECL by the
CLK_SEL pin. The LVDS input includes a 100Ω internal
termination, thus eliminating the need for external
termination. The Output Enable (OE) is synchronous so
that the outputs will only be enabled/disabled when they
are already in the LOW state. This eliminates any chance
of generating a runt clock pulse when the device is enabled/
disabled as can happen with an asynchronous control.
The SY89825U features low pin-to-pin skew (35ps max.)
—performance previously unachievable in a standard
product having such a high number of outputs. The
SY89825U is available in a single space saving package
which provides a lower overall cost solution. In addition, a
single chip solution improves timing budgets by eliminating
the multiple device solution with their corresponding large
part-to-part skew.
APPLICATIONS
s High-performance PCs
s Workstations
s Parallel processor-based systems
s Other high-performance computing
s Communications
Rev.: A Amendment: /0
1
Issue Date: September 2001