SY89824L_07 Datasheet, PDF (1/7 Pages) Micrel Semiconductor – 3.3V 1:22 HIGH-PERFORMANCE, LOW VOLTAGE BUS CLOCK DRIVER

Micrel, Inc.
3.3V 1:22 HIGH-PERFORMANCE,
Precision Edge^®
Precision E^Sd^Yg⁸⁹e^8®24L
LOW VOLTAGE BUS CLOCK DRIVER
SY89824L
FEATURES
s 3.3V core supply, 1.8V output supply for reduced
power
s LVPECL and HSTL inputs
s 22 differential HSTL (low-voltage swing) output pairs
s HSTL outputs drive 50Ω to ground with no offset
voltage
s Low part-to-part skew (200ps max.)
s Low pin-to-pin skew (50ps max.)
s Available in a 64-Pin EPAD-TQFP
APPLICATIONS
s High-performance PCs
s Workstations
s Parallel processor-based systems
s Other high-performance computing
s Communications
Precision Edge^®
DESCRIPTION
The SY89824L is a High Performance Bus Clock Driver
with 22 differential HSTL (High Speed Transceiver Logic)
output pairs. The part is designed for use in low voltage
(3.3V/1.8V) applications which require a large number of
outputs to drive precisely aligned, ultra low skew signals to
their destination. The input is multiplexed from either HSTL
or LVPECL (Low Voltage Positive Emitter Coupled Logic)
by the CLK_SEL pin. The Output Enable (OE) is
synchronous so that the outputs will only be enabled/
disabled when they are already in the LOW state. This
avoids any chance of generating a runt clock pulse when
the device is enabled/disabled as can happen with an
asynchronous control.
The SY89824L features low pin-to-pin skew (50ps max.)
and low part-to-part skew (200ps max.)—performance
previously unachievable in a standard product having such
a high number of outputs. The SY89824L is available in a
single space saving package, enabling a lower overall cost
solution.
LOGIC SYMBOL
CLK_SEL
HSTL_CLK
0
/HSTL_CLK
LVPECL_CLK
1
/LVPECL_CLK
OE
LEN
Q
D
22
Q0 - Q21
22
/Q0 - /Q21
Precision Edge is a registered trademark of Micrel, Inc.
M9999-020207
[e-mail] or [phone]
1
Rev.: G Amendment: /0
Issue Date: February 2007