SY89425 Datasheet, PDF (1/8 Pages) Micrel Semiconductor – DUAL SONET OC-12 CLOCK SYNTHESIZER

DUAL SONET OC-12
CLOCK SYNTHESIZER
ClockWorks™
SY89425
FEATURES
s Two independently-powered 622.08MHz clock
sources one chip
s Differential PECL outputs
s TTL/CMOS compatible inputs
s SONET compliant jitter performance (≤0.01UI)
s Choice of three reference frequencies for each PLL
s Only 395mW per PLL (typ)
s Complies with Bellcore, CCITT and ANSI standards
s Single +5 volt power supply
s Fully compatible with industry standard 10KH I/O
levels
s Available in 28-pin PLCC package
DESCRIPTION
Micrel-Synergy's SY89425 Dual Phase Locked Loop
(PLL) consists of two totally separate, SONET compliant
622.08MHz clock generators on one chip. The user may
select to power both PLLs or PLL A only. Each PLL
produces a low-jitter OC-12/STS-12 clock rate from an
input reference clock of 38.88, 51.84, or 77.76MHz. When
using both PLLs, it is not necessary that they share a
common reference clock (e.g., PLL A may operate from an
STS-1 reference of 51.84MHz, while PLL B operates from
an OC-3/STS-3 reference of 77.76MHz).
The SY89425 operates from a single +5 volt supply, and
requires only a simple series RC loop filter for each PLL.
Coupling Micrel-Synergy's advanced PLL technology
with our proprietary ASSET™ bipolar process has produced
a clock generator IC which exceeds applicable Bellcore
and ANSI specifications, while setting a new standard for
performance and flexibility.
TYPICAL APPLICATION
+5V
+5V
PIN CONFIGURATION
CLOCK IN
GND VCCA
RFCKA
(TTL)
VCCOA
RSTA
(TTL)
0.1uF
FLTRAN
FLTRAP
500Ω
SEL39A
(TTL)
SEL78A
(TTL)
PLL A
CK622AP
(PECL)
CK622AN
622.08MHz
2X 50Ω
+3V
PLL B
GN(DSAME _{AS PLL AA)GND}
SEL39A
SEL78A
RFCKA
VCCA
RFCKB
SEL78B
SEL39B
25 24 23 22 21 20 19
26
18
27
17
28
16
PLCC
1
TOP VIEW
15
2
14
3
13
4
12
5 6 7 8 9 10 11
CK622AP
CK622AN
VCCOA
GND
VCCOB
CK622BN
CK622BP
Rev.: E
Amendment: /0
1
Issue Date: August, 1998