SY88933V Datasheet, PDF (1/8 Pages) Micrel Semiconductor – 3.3V/5V 1.25Gbps PECL LOW-POWER LIMITING POST AMPLIFIER

Micrel
3.3V/5V 1.25Gbps PECL LOW-POWER
LIMITING POST AMPLIFIER
w/TTL SIGNAL DETECT
SY88^S9^Y3⁸⁸3⁹V^33V
Final
FEATURES
s Single 3.3V or 5V power supply
s DC to 1.25Gbps operation
s Low noise PECL data outputs
s Chatter-free OC-TTL signal setect (SD) output with
internal 6.75kΩ pull-up resistor
s TTL EN input
s Programmable SD level set (SD_LVL)
s Available in a tiny 10-pin MSOP (3mm) package
APPLICATIONS
s 1.25Gbps Ethernet
s 1.55Mbps and 622Mbps SONET/SDH
s High-gain line driver and line receiver
s 531Mbps and 1062Mbps Fibre Channel
s Gigabit interface converter
DESCRIPTION
The SY88933V low-power limiting post amplifier is
designed for use in fiber-optic receivers. The device connects
to typical transimpedance amplifiers (TIAs). The linear signal
output from TIAs can contain significant amounts of noise
and may vary in amplitude over time. The SY88933V
quantizes these signals and outputs PECL level waveforms.
The SY88933V operates from a single +3.3V or +5V
power supply, over temperatures ranging from –40°C to
+85°C. With its wide bandwidth and high gain, signals with
data rates up to 1.25Gbps and as small as 5mVp-p can be
amplified to drive devices with PECL inputs.
The SY88933V generates a TTL SD output. A
programmable signal-detect level set pin (SD_LVL) sets the
sensitivity of the input amplitude detection. SD asserts high
if the input amplitude rises above the threshold set by SD_LVL
and deasserts low otherwise. EN deasserts the true output
signal without removing the input signal. Typically 4.6dB
SD hysteresis is provided to prevent chattering.
TYPICAL APPLICATIONS CIRCUIT
From
Transimpedance
Amp.
0.1µF
0.1µF
50Ω
SD
D_IN
/D_IN
50Ω
V_CC
EN
SY88933V
D_OUT
/D_OUT
SD_LVL V_REF
R_pd
0.1µF
0.1µF
R_pd
To
CDR
GND ^VCC
100kΩ ^0.1µF
GND
For 3.3V, R_pd = 120Ω
For 5V, R_pd = 220Ω
Rev.: A Amendment: /0
1
Issue Date: May 1, 2003