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SY69754AL Datasheet, PDF (1/14 Pages) Micrel Semiconductor – 3.3V, 622Mbps Clock and Data Recovery | |||
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SY69754AL
3.3V, 622Mbps Clock
and Data Recovery
General Description
The SY69754AL is a complete Clock Recovery and
Data Retiming integrated circuit for OC-12/STS-12
applications at 622Mbps NRZ. The device is ideally
suited for SONET/SDH/ATM applications and other
high-speed data transmission systems.
Clock recovery and data retiming is performed by
synchronizing the on-chip VCO directly to the incoming
data stream. The VCO center frequency is controlled by
the reference clock frequency and the selected divide
ratio. On-chip clock generation is performed through the
use of a frequency multiplier PLL with a byte rate source
as reference.
The SY69754AL also includes a link fault detection
circuit.
Datasheets and support documentation can be found on
Micrelâs web site at: www.micrel.com.
Features
3.3V power supply
⢠SONET/SDH/ATM compatible
⢠Clock and data recovery for 622Mbps NRZ data
stream
⢠Two on-chip PLLs: one for clock generation and
another for clock recovery
⢠Selectable reference frequencies
⢠Differential PECL high-speed serial I/O
⢠Line receiver input: no external buffering needed
⢠Link fault indication
⢠100k ECL compatible I/O
⢠Industrial temperature range (â40°C to +85°C)
⢠Available in 32-pin EPAD-TQFP
Applications
⢠Ethernet media converter
⢠SONET/SDH/ATM OC-12
⢠Proprietary architecture at 500Mbps to 650Mbps
Micrel Inc. ⢠2180 Fortune Drive ⢠San Jose, CA 95131 ⢠USA ⢠tel +1 (408) 944-0800 ⢠fax + 1 (408) 474-1000 ⢠http://www.micrel.com
November 2006
M9999-111406-D
hbwhelp@micrel.com or (408) 955-1690
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