SY604 Datasheet, PDF (1/8 Pages) Micrel Semiconductor – 125MHz TRIGGER PROGRAMMABLE TIMING EDGE VERNIER

125MHz TRIGGER
PROGRAMMABLE TIMING
EDGE VERNIER
SY604
FEATURES
s True 125MHz retrigger rate
s Pin-compatible with Bt604
s 15ps delay resolution
s Less than ± 1 LSB timing accuracy
s Differential TRIGGER inputs
s Delay spans from 4 to 40ns
s Compatible with 10KH ECL logic
s Lower power dissipation 350mW typical
s Available in 28-pin plastic (PLCC) or metal (MLCC)
J-lead package
BLOCK DIAGRAM
8
8
D0 - D7
LATCH
DAC
I/V
DESCRIPTION
Micrel-Synergy's SY604 is an ECL-compatible timing vernier
(delay generator) whose time delay is programmed via an 8-
bit code which is loaded concurrently with the circuit trigger.
The SY604 is fabricated in Micrel-Synergy's proprietary
ASSET™ bipolar process.
This device can be retriggered at speeds up to 125MHz,
with a delay span as short as 4ns. At minimum span, the
resolution is 4ns/255 = 15.7ps per step. The delay span is
externally adjustable up to 40ns. The SY604 employs
differential TRIGGER inputs, and produces a differential
OUTPUT pulse; all other control signals are single-ended
ECL. Edge delay is specified by an 8-bit input which is loaded
into the device with the TRIGGER. The output pulse width will
typically be 3.5ns.
The SY604 is commonly used in Automatic Test Equipment
to provide precise timing edge placement; it is also found in
many instrumentation and communications applications.
Micrel-Synergy's circuit design techniques coupled with
ASSET™ technology result in not only ultra-fast performance,
but allow device operation at lower power dissipation than
competing technologies. Outstanding reliability is achieved in
volume production.
VBB
CE
TRIG
+
PULSE
–
GEN
D
FF
R
0 = STOP
1 = RUN
LINEAR
RAMP
GENERATOR
IEXT
PIN CONFIGURATION
OUT
25 24 23 22 21 20 19
D0
26
18
NC
D1
27
17
COMP2
D2
28
D3
1
D4
2
D5
3
TOP VIEW
PLCC
J28-1
16
CE
15
COMP1
14
NC
13
VBB
D6
4
12
IEXT
5 6 7 8 9 10 11
Rev.: E Amendment: /0
1
Issue Date: May, 1998