SY58032U_07 Datasheet, PDF (1/8 Pages) Micrel Semiconductor – ULTRA-PRECISION 1:8 FANOUT vBUFFER WITH LVPECL OUTPUTS AND INTERNAL TERMINATION

Micrel, Inc.
ULTRA-PRECISION 1:8 FANOUT
BUFFER WITH LVPECL OUTPUTS
AND INTERNAL TERMINATION
Precision Edge^®
Precision E^Sd^Y5g⁸e^0®32U
SY58032U
FEATURES
■ Precision 1:8, LVPECL fanout buffer
■ Guaranteed AC performance over temperature and
voltage:
• Clock frequency range: DC to 4GHz
• <110ps t_r / t_f times
• <330ps t_pd
• <20ps skew
■ Low-jitter performance:
• <10ps_PP total jitter (clock)
• <1ps_RMS random jitter
■ 100k LVPECL compatible outputs
■ Fully differential inputs/outputs
■ Accepts an input signal as low as 100mV
■ Unique input termination and V_T pin accepts DC-
coupled and AC-coupled differential inputs:
(LVPECL, LVDS, and CML)
■ Power supply 2.5V ±5% or 3.3V ±10%
■ Industrial temperature range: –40°C to +85°C
■ Available in 32-pin (5mm × 5mm) MLF^® package
APPLICATIONS
Precision Edge^®
DESCRIPTION
The SY58032U is a 2.5V/3.3V precision, high-speed, fully
differential LVPECL 1:8 fanout buffer. The SY58032U is
optimized to provide eight identical output copies with less
than 20ps of skew and less than 10ps_pp total jitter. It can
process clock signals as fast as 4GHz.
The differential input includes Micrel’s unique, 3-pin input
termination architecture that allows the SY58032U to directly
interface to LVPECL, CML, and LVDS differential signals
(AC- or DC-coupled) without any level-shifting or termination
resistor networks in the signal path. The result is a clean,
stub-free, low-jitter interface solution. The LVPECL (100k
temperature compensated) outputs feature 800mV typical
swing into 50Ω loads, and provide an extremely fast rise/fall
time guaranteed to be less than 110ps.
The SY58032U operates from a 2.5V ±5% supply or
3.3V ±10% supply and is guaranteed over the full industrial
temperature range (–40°C to +85°C). For applications that
require a higher high-speed 1:8 fanout buffer, consider the
SY58031U or SY58033U. The SY58032U is part of Micrel’s
high-speed, Precision Edge^® product line.
All support documentation can be found on Micrel’s web
site at www.micrel.com.
FUNCTIONAL BLOCK DIAGRAM
■ All SONET and all GigE clock distribution
Q0
■ All Fibre Channel clock and data distribution
/Q0
■ Network routing engine timing distribution
Q1
■ High-end, low-skew multiprocessor synchronous
/Q1
clock distribution
Q2
/Q2
IN
50Ω
Q3
V_T
/Q3
50Ω
/IN
Q4
V_REF-AC
/Q4
Q5
/Q5
Precision Edge is a registered trademark of Micrel, Inc.
MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc.
M9999-020707
[e-mail] or [phone]
1
Q6
/Q6
Q7
/Q7
Rev.: D Amendment: /0
Issue Date: February 2007