SY10EP53V Datasheet, PDF (1/5 Pages) Micrel Semiconductor – 5V/3.3V DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP WITH SET AND RESET

Micrel
5V/3.3V DIFFERENTIAL DATA
AND CLOCK D FLIP-FLOP WITH
SET AND RESET
ECL_SEYP^C1r_0Lo_EP™_Pr5o3™V
SY10EP53V
FINAL
FEATURES
s 3.3V and 5V power supply options
s 3.0GHz toggle frequency
s 75KΩ internal input pulldown resistors
s Available in 10-pin MSOP package
PIN CONFIGURATION/BLOCK DIAGRAM
MSOP
TOP VIEW
ECL Pro™
DESCRIPTION
The SY10EP53V is a differential data, differential clock
D flip-flop with set and reset. The EP53V is ideally suited
for those applications which require the ultimate in AC
performance.
Data enters the master portion of the flip-flop when
the clock is LOW and is transferred to the slave, and
thus the outputs, upon a positive transition of the clock.
The differential clock inputs also allow the EP53V to be
used as a negative edge triggered device. Both set and
reset inputs are asynchronous, level triggered signals.
The EP53V employs input clamping circuitry so that,
under open input conditions (pulled down to V_EE), the
outputs of the device will remain stable.
PIN NAMES
Pin
D, /D
CLK, /CLK
Q, /Q
V_CC, V_EE
SET
RESET
Function
Data Input (ECL)
Clock Input (ECL)
Data Output (ECL)
Power Supply
ECL Asynchonous Set
ECL Asynchonous Reset
TRUTH TABLE⁽¹⁾
D
SET
RESET
L
L
L
H
L
L
X
H
L
X
L
H
X
H
H
Note 1. Z = LOW-to-HIGH transition.
CLK
Z
Z
X
X
X
Q
L
H
H
L
UNDEF
ECL Pro is a trademark of Micrel, Inc.
1
Rev.: C Amendment: /0
Issue Date: March 2003