SY10ELT22L Datasheet, PDF (1/4 Pages) Micrel Semiconductor – 3.3V DUAL TTL-to-DIFFERENTIAL PECL TRANSLATOR

3.3V DUAL
TTL-to-DIFFERENTIAL
PECL TRANSLATOR
SY10ELT22L
SY100ELT22L
FEATURES
s 3.3V power supply
s 300ps typical propagation delay
s <100ps output-to-output skew
s Differential PECL outputs
s PNP TTL inputs for minimal loading
s Flow-through pinouts
s Available in 8-pin SOIC package
DESCRIPTION
The SY10/100ELT22L are dual TTL-to-differential
PECL translators with +3.3V power supply. Because
PECL (Positive ECL) levels are used, only +3.3V and
ground are required. The small outline 8-lead SOIC
package and the low skew, dual gate design of the
ELT22L makes it ideal for applications which require the
tranlation of a clock and a data signal.
The ELT22L is available in both ECL standards: the
10ELT is compatible with positive ECL 10H logic levels,
while the 100ELT is compatible with positive ECL 100K
logic levels.
PIN CONFIGURATION/BLOCK DIAGRAM
Q0 1
Q0 2
PECL
Q1 3
Q1 4
8 VCC
7 D0
TTL
6 D1
5 GND
PIN NAMES
Pin
Qn
Dn
VCC
GND
Function
Differential PECL Outputs
TTL Inputs
+3.3V Supply
Ground
SOIC
TOP VIEW
Rev.: H Amendment: /0
1
Issue Date: March, 1999