SY10EL32V Datasheet, PDF (1/4 Pages) Micrel Semiconductor – 5V/3.3V ÷ 2 DIVIDER

5V/3.3V ÷ 2 DIVIDER
ClockWorks™
SY10EL32V
SY100EL32V
FEATURES
s 3.3V and 5V power supply options
s 510ps propagation delay
s 3.0GHz toggle frequency
s High bandwidth output transistions
s Internal 75KΩ input pull-down resistors
s Available in 8-pin SOIC package
DESCRIPTION
The SY10/100EL32V are integrated ÷2 dividers. The
differential clock inputs and the VBB allow a differential,
single-ended or AC-coupled interface to the device. If
used, the VBB output should be bypassed to ground with
a 0.01µF capacitor. Also note that the VBB is designed to
be used as an input bias on the EL32V only; the VBB
output has limited current sink and source capability.
The reset pin is asynchronous and is asserted on the
rising edge. Upon power-on, the internal flip-flop will attain
a random state; the reset allows for the synchronization
of multiple EL32Vs in a system.
PIN CONFIGURATION/BLOCK DIAGRAM
Reset ₁
CLK ₂
CLK ₃
VBB ₄
8 V^CC
R
7Q
÷2
6Q
5 VEE
SOIC
TOP VIEW
PIN NAMES
Pin
CLK
Reset
VBB
Q
Function
Clock Inputs
Asynchronous Reset
Reference Voltage Output
Data Outputs
Rev.: C Amendment: /0
1
Issue Date: August, 1998