SY10EL31 Datasheet, PDF (1/4 Pages) Micrel Semiconductor – D FLIP-FLOP WITH SET AND RESET

D FLIP-FLOP
WITH SET AND RESET
SY10EL31
SY100EL31
FEATURES
s 475ps propagation delay
s 2.8GHz toggle frequency
s Internal 75KΩ input pull-down resistors
s Available in 8-pin SOIC package
PIN CONFIGURATION/BLOCK DIAGRAM
S1
D2
CLK 3
R4
S
D
Flip-Flop
R
8 VCC
7Q
6Q
5 VEE
SOIC
TOP VIEW
DESCRIPTION
The SY10/100EL31 are D flip-flops with set and reset.
The devices are functionally equivalent to the E131
devices, with higher performance capabilities. With
propagation delays and output transition times
significantly faster than the E131, the EL31 is ideally
suited for those applications which require the ultimate
in AC performance.
Both the set and reset inputs are asynchronous, level
triggered signals. Data enters the master portion of the
flip-flop when the clock is LOW and is transferred to the
slave, and thus the outputs, upon a positive transition of
the clock.
PIN NAMES
Pin
D
Q
S
R
CLK
Function
Data Inputs
Data Outputs
Set
Reset
Clock Input
TRUTH TABLE⁽¹⁾
D
S
R
L
L
L
H
L
L
X
H
L
X
L
H
X
H
H
NOTE:
1. Z = LOW-to-HIGH transition.
CLK
Z
Z
X
X
X
Q
L
H
H
L
Undef
Rev.: E Amendment: /0
1
Issue Date: August, 1998