SY10E111_06 Datasheet, PDF (1/4 Pages) Micrel Semiconductor – 1:9 DIFFERENTIAL CLOCK DRIVER WITH ENABLE

Micrel, Inc.
1:9 DIFFERENTIAL CLOCK
DRIVER WITH ENABLE
SY10E111
SY1^S0^YE¹⁰1⁰1^E1¹¹¹
SY100E111
FEATURES
s Low skew
s Extended 100E V_EE range of –4.2V to –5.5V
s Guaranteed skew limits
s Differential design
s V_BB output
s Enable input
s Fully compatible with industry standard 10KH, 100K
I/O levels
s 75KΩ input pulldown resistors
s Fully compatible with ON Semiconductor
MC10E/100E111
s Available in 28-pin PLCC package
BLOCK DIAGRAM
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
IN
Q4
IN
Q4
Q5
EN
Q5
Q6
Q6
Q7
Q7
Q8
VBB
Q8
DESCRIPTION
The SY10/100E111 are low skew 1-to-9 differential
drivers designed for clock distribution in new, high-
performance ECL systems. They accept one differential or
single-ended input, with V_BB used for single-ended
operation. The signal is fanned out to nine identical
differential outputs. An enable input is also provided such
that a logic HIGH disables the device by forcing all Q
outputs LOW and all /Q outputs HIGH.
The device is specifically designed and produced for low
skew. The interconnect scheme and metal layout are
carefully optimized for minimal gate-to-gate skew within
the device. Wafer characterization and process control
ensure consistent distribution of propagation delay from lot
to lot. Since the E111 shares a common set of “basic”
processing with the other members of the ECLinPS™
family, wafer characterization at the point of device
personalization allows for tighter control of parameters,
including propagation delay.
To ensure that the skew specification is met, it is
necessary that both sides of the differential output are
terminated into 50Ω, even if only one side is being used. ln
most applications, all nine differential pairs will be used
and, therefore, terminated. In the case where fewer than
nine pairs are used, it is necessary to terminate at least the
output pairs on the same package side (i.e. sharing the
same V_CCO as the pair(s) being used on that side) in order
to maintain minimum skew.
The V_BB output is intended for use as a reference
voltage for single-ended reception of ECL signals to that
device only. When using V_BB for this purpose, it is
recommended that V_BB is decoupled to V_CC via a 0.01µF
capacitor.
PIN NAMES
Pin
IN, /IN
/EN
Q0, /Q0 — Q8, /Q8
V_BB
V_CCO
Function
Differential Input Pair
Enable Input
Differential Outputs
V_BB Output
V_CC to Output
M9999-032006
[e-mail] or [phone]
1
Rev.: E Amendment: /0
Issue Date: March 2006