SY100S318_06 Datasheet, PDF (1/6 Pages) Micrel Semiconductor – 5-WIDE 5, 4, 4, 4, 2 OA/OAI GATE

Micrel, Inc.
5-WIDE 5, 4, 4, 4, 2
OA/OAI GATE
SY100S318
SY100S318
FEATURES
DESCRIPTION
s Max. propagation delay of 800ps
s IEE min. of –55mA
s Extended supply voltage option:
VEE = –4.2V to –5.5V
s Voltage and temperature compensation for
improved noise immunity
s Internal 75KΩ input pull-down resistors
s 70% faster than Fairchild
s 40% lower power than Fairchild
s Function and pinout compatible with Fairchild F100K
s Available in 24-pin CERPACK and 28-pin PLCC
packages
The SY100S318 is an ultra-fast 5-wide 5, 4, 4, 4, 2 OR/
AND gate with both true and complementary outputs,
designed for use in high-performance ECL systems. The
inputs on this device have 75KΩ pull-down resistors.
BLOCK DIAGRAM
D1a
D2a
D3a
D4a
D5a
D1b
D2b
D3b
D4b
D1c
D2c
D3c
D4c
D1d
D2d
D3d
D4d
D1e
D2e
PIN NAMES
Pin
Dna – Dne
O–O
VEES
VCCA
Function
Data Inputs (n = 1...5)
Data Outputs
VEE Substrate
VCCO for ECL Outputs
O
O
M9999-032206
[e-mail] or [phone]
1
Rev.: H
Amendment: /0
Issue Date: March 2006