SY100S314_06 Datasheet, PDF (1/6 Pages) Micrel Semiconductor – QUINT DIFFERENTIAL LINE RECEIVER

Micrel, Inc.
QUINT DIFFERENTIAL
LINE RECEIVER
SY100S314
SY100S314
FEATURES
DESCRIPTION
s Max. propagation delay of 900ps
s Differential outputs
s IEE min. of –60mA
s Extended supply voltage option:
VEE = –4.2V to –5.5V
s Voltage and temperature compensation for improved
noise immunity
s VBB output for single-ended use
s More than twice as fast as Fairchild
s Function and pinout compatible with Fairchild F100K
s Available in 24-pin CERPACK and 28-pin PLCC
packages
The SY100S314 offers five differential line receivers
with emitter follower outputs, designed for use in high-
performance ECL systems. For single-ended operation,
the VBB reference voltage is available. In the single-ended
mode, the apparent input threshold of the true inputs is
30mV higher than the threshold of the complementary
inputs.
Common mode rejection of +1.0V is achieved through
the use of active current sources. If both the true and
complement inputs are at the same potential between VEE
and VCC, then the complementary outputs will take on a
logic HIGH state. Unlike the other members of the Synergy
300K family, the inputs on this device do not have pull-
down resistors.
BLOCK DIAGRAM
Da
Oa
Da
Oa
Db
Ob
Db
Ob
Dc
Oc
Dc
Oc
Dd
Od
Dd
Od
De
Oe
De
Oe
VBB
PIN NAMES
Pin
Da – De
Da – De
Oa – Oe
Oa – Oe
VEES
VCCA
Function
Data Inputs
Inverting Data Inputs
Data Outputs
Complementary Data Outputs
VEE Substrate
VCCO for ECL Outputs
M9999-032206
[e-mail] or [phone]
1
Rev.: H Amendment: /0
Issue Date: March 2006