SY100S313 Datasheet, PDF (1/5 Pages) Micrel Semiconductor – QUAD DRIVER

QUAD DRIVER
SY100S313
FEATURES
DESCRIPTION
s Max. propagation delay of 800ps
s Enable to Output max. of 950ps
s IEE min. of –60mA
s Extended supply voltage option:
VEE = –4.2V to –5.5V
s Voltage and temperature compensation for
improved noise immunity
s Internal 75KΩ input pull-down resistors
s 50% faster than Fairchild 300K
s Function and pinout compatible with Fairchild F100K
s Available in 24-pin CERPACK and 28-pin PLCC
packages
BLOCK DIAGRAM
O1a
Da
O2a
O1a
O2a
O1b
Db
O2b
O1b
O2b
O1c
Dc
O2c
O1c
O2c
O1d
Dd
O2d
E
O1d
O2d
The SY100S313 offers four drivers with two OR and two
NOR outputs, designed for use in high-performance ECL
systems. The four drivers are controlled by a common
Enable signal which is buffered to minimize input loading.
If the D inputs are not used, the Enable signal can be used
to drive sixteen 50Ω lines. All inputs have 75KΩ pulldown
resistors and all outputs are buffered.
PIN CONFIGURATIONS
Da
Db
VEE
VEES
E
Dc
Dd
11 10 9 8 7 6 5
12
4
13
3
14
Top View
2
15
PLCC
J28-1
1
16
28
17
27
18
26
19 20 21 22 23 24 25
O2b
O1b
VCCA
VCC
VCC
O1c
O2c
24 23 22 21 20 19
O1d
1
18
O1a
O2d
2
17
O2a
O1d
3
O2d
4
O2c
5
Top View 16 O1a
Flatpack
F24-1
15
O2a
14
O2b
O1c
6
13
O1b
7 8 9 10 11 12
PIN NAMES
Pin
Da – Dd
E
Ona – Ond
Ona – Ond
VEES
VCCA
1
Function
Data Inputs (n-1...5)
Enable Input
Data Outputs
Complementary Data Outputs
VEE Substrate
VCCO for ECL Outputs
Rev.: G Amendment: /0
Issue Date: July, 1999