SY100S307_10 Datasheet, PDF (1/4 Pages) Micrel Semiconductor – QUINT EXCLUSIVE OR/NOR GATE

Micrel, Inc.
QUINT EXCLUSIVE
OR/NOR GATE
SY100S307
SY100S307
FEATURES
DESCRIPTION
■ Max. propagation delay of 1000ps
■ IEE min. of –58mA
■ Extended supply voltage option:
VEE = –4.2V to –5.5V
■ Voltage and temperature compensation for improved
noise immunity
■ Internal 75kΩ input pull-down resistors
■ 50% faster than Fairchild 300K at lower power
■ Function and pinout compatible with Fairchild F100K
■ Available in 28-pin PLCC package
The SY100S307 is an ultra-fast quint exclusive-OR/NOR
gate designed for use in high-performance ECL systems. A
function output that is the wire-OR result of the exclusive-OR
outputs is also available. The inputs on the device have 75kΩ
pull-down resistors.
block DIAGRAM
PIN NAMES
Pin
Dna – Dne
E
Oa – Oe
Oa – Oe
VEES
VCCA
Function
Data Inputs (n-1...5)
Enable Input
Data Outputs
Complementary Data Outputs
VEE Substrate
VCCO for ECL Outputs
M9999-060910
[e-mail] or [phone]
1
Rev.: I
Amendment: /0
Issue Date: June 2010