SY100S301_07 Datasheet, PDF (1/5 Pages) Micrel Semiconductor – TRIPLE 5-INPUT OR/NOR GATE

Micrel, Inc.
TRIPLE 5-INPUT
OR/NOR GATE
SY100S301
SY100S301
FEATURES
DESCRIPTION
s Max. propagation delay of 750ps
s IEE min. of –25mA
s Industry standard 100K ECL levels
s Extended supply voltage option:
VEE = –4.2V to –5.5V
s Voltage and temperature compensation for
improved noise immunity
s 20% faster than Fairchild 300K at lower power
s Internal 75kΩ input pull-down resistors
s Function and pinout compatible with Fairchild F100K
s Available in 28-pin PLCC package
The SY100S301 is an ultra-fast triple 5-input OR/NOR
gate designed for use in high-performance ECL systems.
The inputs on this device have 75kΩ pull-down resistors.
BLOCK DIAGRAM
D1a
D2a
Oa
D3a
D4a
Oa
D5a
D1b
D2b
Ob
D3b
D4b
Ob
D5b
D1c
D2c
Oc
D3c
D4c
Oc
D5c
PIN NAMES
Pin
Dna, Dnb, Dnc
Oa, Ob, Oc
Oa, Ob, Oc
VEES
VCCA
Function
Data Inputs (n-1...5)
Data Outputs
Complementary Data Outputs
VEE Substrate
VCCO for ECL Outputs
M9999-042307
[e-mail] or [phone]
1
Rev.: H
Amendment: /0
Issue Date: April 2007