SY100E417_06 Datasheet, PDF (1/5 Pages) Micrel Semiconductor – QUINT LVPECL-TO-PECL QUINT LVPECL-TO-PECL TRANSLATOR

Micrel, Inc.
QUINT LVPECL-TO-PECL
OR PECL-TO-LVPECL
TRANSLATOR
SY100E417
SY100E417
FEATURES
s 3.3V and 5V power supplies required
s Also, supports LVPECL-to-PECL translation
s 500ps propagation delays
s Fully differential design
s Differential line receiver capability
s Available in 28-pin PLCC package
BLOCK DIAGRAM
D0
Q0
D0
Q0
D1
Q1
D1
Q1
D2
Q2
D2
Q2
D3
Q3
D3
Q3
D4
Q4
D4
Q4
VBB
PIN NAMES
Pin
Dn
Qn
VBB
VCCO
VCC_VBB
GND
VCC
Function
PECL / LVPECL Inputs
PECL / LVPECL Outputs
Reference Voltage Output
VCC for Outputs
VCC for VBB Output
Common Ground Rail
VCC for Internal Circuitry
M9999-032206
[e-mail] or [phone]
DESCRIPTION
The SY100E417 is a quint LVPECL-to-PECL translator.
It can also be used as a quint PECL-to-LVPECL translator.
The device receives standard PECL signals and translates
them to differential LVPECL output signals (or vice versa).
The SY100E417 can also be used as a differential line
receiver for PECL-to-PECL or LVPECL-to-LVPECL signals.
However, please note that for the latter we will need two
different power supplies. Please refer to Function Table for
more details.
A VBB output is provided for interfacing single ended
input signals. If a single ended input is to be used, the VBB
output should be connected to the Dn input and the active
signal will drive the Dn input. When used, the VBB should
be bypassed to VCC via a 0.01µF capacitor. The VBB is
designed to act as a switching reference for the SY100E417
under single ended input conditions. As a result, the pin
can only source/sink 0.5mA of current.
To accomplish the PECL-to-LVPECL level translation,
the SY100E417 requires three power rails. The VCC and
VCC_VBB supply is to be connected to the standard PECL
supply, the 3.3V supply is to be connected to the VCCO
supply, and GND is connected to the system ground plane.
Both the VCC and VCCO should be bypassed to ground with
a 0.01µF capacitor.
To accomplish the LVPECL-to-PECL level translation,
the SY100E417 requires three power rails as well. The 5.0V
supply is connected to the VCC and VCCO pins, 3.3V supply
is connected to the VCC_VBB pin and GND is connected to
the system ground plane. VCC_VBB is used to provide a
proper VBB output level if a single ended input is used.
VCC_VBB = 3.3V is only required for single-ended LVPECL
input. For differential LVPECL input, VCC_VBB can be either
3.3V or 5.0V.
Under open input conditions, the Dn input will be biased
at a VCC/2 voltage level and the Dn input will be pulled to
GND. This condition will force the "Qn" output low, ensuring
stability.
FUNCTION TABLE
Function
PECL-to-LVPECL
LVPECL-to-PECL
PECL-to-PECL
LVPECL-to-LVPECL
Vcc
5.0V
5.0V
5.0V
5.0V
Vcco
3.3V
5.0V
5.0V
3.3V
Vcc_VBB
5.0V
3.3V
5.0V
3.3V
Rev.: E Amendment: /0
1
Issue Date: March 2006