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MIC4100_11 Datasheet, PDF (16/18 Pages) MIC GROUP RECTIFIERS – 100V Half Bridge MOSFET Drivers
Micrel, Inc.
Low-side drive turn-off
current path
Vdd
LO
CVdd
HB
Vss
LI
HO
CB
HS
High-side drive turn-on
current path
Level
shift
HI
Turn-Off Current Paths
Figure 10
The following circuit guidelines should be adhered to for
optimum circuit performance:
1. The Vcc and HB bypass capacitors must be
placed close to the supply and ground pins. It is
critical that the etch length between the high side
decoupling capacitor (CB) and the HB & HS pins
be minimized to reduce lead inductance.
2. A ground plane should be used to minimize
parasitic inductance and impedance of the return
paths. The MIC4100 is capable of greater than 2A
peak currents and any impedance between the
MIC4100, the decoupling capacitors and the
external MOSFET will degrade the performance of
the driver.
3. Trace out the high di/dt and dv/dt paths, as shown
in Figures 9 and 10 and minimize etch length and
loop area for these connections. Minimizing these
parameters decreases the parasitic inductance
and the radiated EMI generated by fast rise and
fall times.
A typical layout of a synchronous Buck converter power
stage (Figure 11) is shown in Figure 12.
MIC4100/1
CVDD
HI
Vdd
Level
shift
LI
CB
HB
HO
HS
LO
MIC4100
Vss
Figure 11
Vin
High-Side Fet
HS (switch) Node
Low-Side Fet Cin
March 2006
16
M9999-031506