TH71221_15 Datasheet, PDF (5/44 Pages) Melexis Microelectronic Systems – FSK/FM/ASK Transceiver

1.4 Block Diagram
TH71221
27 to 930MHz
FSK/FM/ASK Transceiver
27
29
28 30
32 31 1
2
7
IN_LNA
MIX
LNA
26
IF
IFA
LO
1.5pF
3 IN_DEM
6 OUT_DEM
PKDET
SW1
FSK Demodulator
MIX
bias _OA2
4
INT2/PDO
5
INT1
SW2
200k
OA1
8
OUT_DTA
ASK
OUT_PA _PA
25
24 PS_PA
N
counter
VCO
R
counter
RO
RO
Control Logic
FSK
21 TNK_LO 20 VCC_PLL 23 LF
22 VEE_PLL 10 RO
11 19
9 12 13 15 16 17
SCI
18 14
Fig. 1: TH71221 block diagram
1.5 User Mode Features
The transceiver can operate in two different user modes. It can be used either as a 3wire-bus-controlled
programmable or as a stand-alone fixed-frequency device. After power up, the transceiver is set to Stand-
alone User Mode (SUM). In this mode, pins FS0/SDEN and FS1/LD must be connected to V_EE or V_CC in
order to set the desired frequency of operation. There are 4 pre-defined frequency settings: 315MHz,
433.92MHz, 868.3MHz and 915MHz. The logic level at pin FS0/SDEN must not be changed after power up
in order to remain in fixed-frequency mode.
After the first logic level change at pin FS0/SDEN, the transceiver enters into Programmable User Mode
(PUM). In this mode, the user can set any PLL frequency or mode of operation by the SCI. In SUM pins
FS0/SDEN and FS1/LD are used to set the desired frequency, while in PUM pin FS0/SDEN is part of the
3-wire serial control interface (SCI) and pin FS1/LD is the look detector output signal of the PLL synthesizer.
A mode control logic allows several operating modes. In addition to standby, transmit and receive mode, two
idle modes can be selected to run either the reference oscillator only or the whole PLL synthesizer. The PLL
settings for the PLL idle mode are taken over from the last operating mode which can be either receive or
transmit mode.
The different operating modes can be set in SUM and PUM as well. In SUM the user can program the trans-
ceiver via control pins RE/SCLK and TE/SDTA. In PUM the register bits OPMODE are used to select the
modes of operation while pins RE/SCLK and TE/SDTA are part of the SCI.
39010 071221
Rev. 009
Page 5 of 44
Data Sheet
Nov/15