TH7122 Datasheet, PDF (10/44 Pages) Melexis Microelectronic Systems – 27 to 930MHz FSK/FM/ASK Transceiver

TH7122
27 to 930MHz
FSK/FM/ASK Transceiver
3 Functional Description
3.1 PLL Frequency Synthesizer
The TH7122 contains an integer-N PLL frequency synthesizer. A PLL circuit performs the frequency synthe-
sis via a feedback mechanism. The output frequency f_VCO is generated as an integer multiple of the phase
detector comparison frequency f_R .This reference frequency f_R is generated by dividing the output frequency
f_RO of a crystal oscillator. The phase detector utilizes this signal as a reference to tune the VCO and in the
locked state it must be equal to the desired output frequency, divided by the feedback divider ratio N.
Reference Reference
Oscillator
Divider
f _RO
Phase-frequency
Detector
f_R
Charge
Pump
VCC
External
Loop Filter
LF
f _VCO
f_N
Feedback Voltage Controlled
Divider
Oscillator
Fig. 2: Integer-N PLL Frequency Synthesizer Topology
The output frequency of the synthesizer f_VCO can be selected by programming the feedback divider and the
reference divider. The only constraint for the frequency output of the system is that the minimum frequency
resolution, or the channel spacing, must be equal to the PFD frequency f_R, which is given by the reference
frequency f_RO and the reference divider factor R:
f_R
=
f_RO
R
.
(1)
When the PLL is unlocked (e.g. during power up or during reprogramming of a new feedback divider ratio N),
the phase-frequency detector PFD and the charge pump create an error signal proportional to the phase
difference of the two input signals. This error signal is low-pass filtered through the external loop filter and
input to the VCO to control its frequency. A very low frequency resolution increases the settling time of the
PLL and reduces the ability to cancel out VCO perturbations, because the loop filter is updated every 1/f_R.
After the PLL has locked, the VCO frequency is given by the following equation:
f _VCO
= N ⋅ ^fRO
R
=
N ⋅ f_R .
(2)
There are four registers available to set the VCO frequencies in receive (registers RR and NR) and in trans-
mit mode (registers RT and NT). These registers can be programmed using the Serial Control Interface in
Programmable User Mode (PUM). In case of Stand-alone User Mode (SUM), the registers are set fixed val-
ues (refer to para. 4.1.1).
The VCO frequency is equal to the carrier frequency in transmit mode. While in receive mode the VCO
frequency is offset by the intermediate frequency IF. This is because of the super-heterodyne nature of the
receive part.
39010 07122
Rev. 008
Page 10 of 44
Data Sheet
June/07