MA009A Datasheet, PDF (7/19 Pages) Megawin Technology Co., Ltd – 24-bit I/O extender with interrupt function

Name
P1IEN
Bit 7
IE17
Bit 6
IE16
Port P1 interrupts enable register.
Bit 5
IE15
Bit 4
IE14
Bit 3
IE13
Bit 2
IE12
Bit 1
IE11
Bit 0
IE10
If P1CR.x == 0 (input mode)
P1IEN.0 ~ P1IEN.7: P1.0 ~ P1.7 falling edge interrupts control, 0: disable, 1: enable
Name
P1EVT
Bit 7 Bit 6 Bit 5
ST17 ST16 ST15
Port P1 interrupts events status register.
Bit 4
ST14
Bit 3
ST13
Bit 2
ST12
Bit 1
ST11
Bit 0
ST10
This function is same as port P0. When a falling edge signal is occurs in any interrupt enabled (the bit 0 or bit 1 of
P1IEN is set to 1) pins of port P1, the corresponding bit of P1EVT will be set to 1. The interrupt will be generated
from the INTB (1!0) pin in this condition, and the mater (for example, a microcontroller) can read the interrupt
status from P1EVT. The master can send EVTCLR (13H) command to MA009 to clear the P1EVT after the
interrupt event is processed.
Output Port 2
Name
Bit 7 Bit 6
P2
P27 P26
Port P2 output status register.
Bit 5
P25
Bit 4
P24
Bit 3
P23
Bit 2
P22
Bit 1
P21
Bit 0
P20
Name
Bit 7 Bit 6 Bit 5
P2OR
-
-
-
Port P2 output mode control register
Bit 4
-
Bit 3
-
Bit 2
-
P2OR.0: P2.0 ~ P2.3 CMOS/NMOS selector, 0: CMOS, 1: NMOS
P2OR.1: P2.4 ~ P2.7 CMOS/NMOS selector, 0: CMOS, 1: NMOS
Bit 1 _{Bit 0}
OR21 OR20
Name
P2SCR
Bit 7
-
Bit 6
-
Port P2 sink control register.
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2 Bit 1 _{Bit 0}
- SC21 SC20
P2SCR.0: P2.0 ~ P2.3 output sink ability control, 0: weak, 1: strong (large sink current)
P2SCR.1: P2.4 ~ P2.7 output sink ability control, 0: weak, 1: strong (large sink current)
Name
P2PR
Bit 7
-
Bit 6
-
Port P2 pull high control register.
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2 Bit 1 _{Bit 0}
- PR21 PR20
P2PR.0: P2.0 ~ P2.3 pull high control, 0: enable (large resistance, 350K), 1: disable
P2PR.1: P2.4 ~ P2.7 pull high control, 0: enable (large resistance), 1: disable
MEGAWIN
MA009A Technical Summary
7