MG69L220A Datasheet, PDF (15/27 Pages) Megawin Technology Co., Ltd – 8-Bit Micro-Controller with IO function

MG69L220A Datasheet
Version 0.04
8 Reset
8.1 Low Voltage Reset (LVR)
The MG69L220A provides low voltage reset circuit in order to monitor the supply voltage of the device. If the supply
voltage of the device is within the range 0.9V ~ VLVR, such as changing a battery, the LVR will automatically reset
the device internally.
The LVR includes the following specifications
1. The low voltage (0.9V~VLVR) has to remain in their original state to exceed 1ms. If the low voltage state does
not exceed 1ms, the LVR will ignore it and do not perform a reset function.
2. In the LVR mode, the clock source (INT./EXT. OSC) continuous oscillating and the IO status becomes default
value.
8.2 Watchdog Timer (WDT)
(The example is base on 32.768KHz and SCK_SEL.1 = 1)
Name
Bit 8
RW
WDT
1.9 (Hz) - -
The watchdog timer time-out period is obtained by the equation: (FDIV /512)/512 or (FDIV /4096)/512 select by
SCK_SEL.1 (CKS1).
Before watchdog timer time-out occurs, the program must clear the 9-bit WDT timer by writing 1 to IRQ_CLR.7.
WDT overflow will cause system reset and set IRQ_CLR.7 to high.
F ^{DIV / 512} ₁
F ^{DIV / 4096} ₀
SEL
SCK_SEL.1
FWDT
512
R
Write EVTclr
Data bus _bit7 = 0
Over flow
detection
Pulse
generator
WDT reset
Data bus _bit 7
DS
Q
Write EVTclr
CR
Hard _ rst
WDTevt
Watchdog Block Diagram
Figure 8-1 Watch Dog Diagram
8.3 Reset OK
Address Name
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
Bit 0 R W
00C5H RESOK
RK7 RK6 RK5 RK4
-
-
-
IO_RES - 
RESOK (Reset OK): If the device reset OK and work well, must write #$90 into this register.
For example:
Program_start:
LDA #10010000b
STA $C5
IO_RES: IO reset selector.
0:IO status is reset by WDT, IA reset, LVR and POR, EXT_RESET (Default).
1:IO status is reset by LVR, EXT_RESET and POR.
This document information is the intellectual property of Megawin Technology.
 Megawin Technology Co., Ltd. 2011 All right reserved.
QP-7300-03D
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