MDT10P23CC Datasheet, PDF (8/18 Pages) Micon Design Technology Corporation – 8-bit micro-controller

Power Edge Detect
PED Disable
PED Enable
(B) Program Memory
MDT10P23(CC )
Security bit
Security Disable
Security Enable
Address
000- 3FF
3FF
Description
Program memory
The starting address of the power on, external reset
or WDT
8. Reset Condition for all Registers
Register Address Power-On Reset /MCLR Reset WDT Reset
CPIO A
1111 1111
1111 1111
1111 1111
CPIO B
1111 1111
1111 1111
1111 1111
TMR
--11 1111
--11 1111
--11 1111
IAR
00h
RTCC
01h
xxxx xxxx
uuuu uuuu
uuuu uuuu
PC
02h
1111 1111
1111 1111
1111 1111
STATUS
03h
0001 1xxx
000# #uuu
000# #uuu
MSR
04h
100x xxxx
100u uuuu
1uuu uuuu
PORT A
05h
xxxx xxxx
uuuuuuuu
uuuu uuuu
PORT B
06h
xxxx xxxx
uuuu uuuu
uuuu uuuu
CMR
07h
0000 0000
uuuu uuuu
uuuu uuuu
Note : u unchanged, x unknown, - unimplemented, read as “0”
# value depends on the condition of the following table
Condition
/MCLR reset (not during SLEEP)
/MCLR reset during SLEEP
WDT reset (not during SLEEP)
WDT reset during SLEEP
Status: bit 4
U
1
0
0
Status: bit 3
u
0
1
0
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 8
2005/6 Ver. 1.4