MDT10P62BB Datasheet, PDF (5/18 Pages) Micon Design Technology Corporation – 8-bit micro-controller

(5) MSR (Memory Bank Select Register) : R04
Memory Bank Select Register :
0 : 00~7F (Bank0)
1 : 80~FF (Bank1)
b7
b6
b5
b4
b3
MDT10P62(BB)
b2
b1
b0
(6) PORT A : R05
PA5~PA0, I/O Register
(7) PORT B : R06
PB7~PB0, I/O Register
(8) PORT C : R07
PC7~PC0, I/O Register
(9)PCHLAT : R0A
Indirect Addressing Mode
(10) INTS ( Interrupt Status Register ) : R0B
Bit Symbol
Function
0
RBIF PORT B change interrupt flag. Set when PB <7:4> inputs change
1
INTF Set when INT interrupt occurs. INT interrupt flag.
2
TIF Set when TMR0 overflows.
3
RBIE 0 : disable PB change interrupt
1 : enable PB change interrupt
4
INTS 0 : disable INT interrupt
1 : enable INT interrupt
5
TIS 0 : disable TMR0 interrupt
1 : enable TMR0 interrupt
6
PEIE 0 : disable all peripheral interrupt
1 : enable all peripheral interrupt
7
GIS 0 : disable global interrupt
1 : enable global interrupt
This specification are subject to be changed without notice. Any latest information please preview
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P.5
2008/7 Ver. 1.0