MDT10P61 Datasheet, PDF (4/12 Pages) Micon Design Technology Corporation – 8-bit micro-controller

(5) MSR (Memory Bank Select Register) : R4
Memory Bank Select Register :
0 : 00~7F
1 : 80~FF
MDT10P61
b7
b6
b5
b4
b3
b2
b1
b0
Indirect Addressing Mode
(6) PORT A : R05
PA4~PA0, I/O Register
(7) PORT B : R06
PB7~PB0, I/O Register
(8)PCHLAT : R0A
(9) INTS ( Interrupt Status Register ) : R0B
Bit Symbol
Function
0
RBIF PORT B change interrupt flag. Set when PB <7:4> inputs change
1
INTF Set when INT interrupt occurs. INT interrupt flag.
2
TIF
Set when TMR overflows.
3
RBIE 0 : disable PB change interrupt
1 : enable PB change interrupt
4
INTS 0 : disable INT interrupt
1 : enable INT interrupt
5
TIS
0 : disable TMR interrupt
1 : enable TMR interrupt
6
--
Unimplemented
7
GIS
0 : disable global interrupt
1 : enable global interrupt
This specification are subject to be changed without notice. Any latest information please preview
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P.4
2005/6 Ver. 1.9