MDT10P621 Datasheet, PDF (14/21 Pages) Micon Design Technology Corporation – 8-bit micro-controller

MDT10P621
Mnemonic
Instruction Code _Operands
Function
Operating Status
110100 iiiiiiii
ANDWI i AND W and immediate
i WW
Z
010011 trrrrrrr
IORWR R, t Inclu. OR W and register R W t
Z
110101 iiiiiiii
IORWI i Inclu. OR W and immediate i W W
Z
010100 trrrrrrr
XORWR R, t Exclu. OR W and register R W t
Z
110110 iiiiiiii
XORWI i Exclu. OR W and immediate i W W
Z
011111 trrrrrrr
COMR R, t Complement register
/R t
Z
010110 trrrrrrr
RRR R, t Rotate right register
R(n) R(n-1),
C
C R(7), R(0)
C
010101 trrrrrrr
RLR R, t Rotate left register
R(n) r(n+1),
C
C R(0), R(7)
C
010000 1xxxxxxx CLRW
Clear working register
0W
Z
010001 0rrrrrrr CLRR R Clear register
0R
Z
0000bb brrrrrrr BCR R, b Bit clear
0 R(b)
None
0010bb brrrrrrr BSR R, b Bit set
1 R(b)
None
0001bb brrrrrrr BTSC R, b Bit Test, skip if clear
Skip if R(b)=0 None
0011bb brrrrrrr BTSS R, b Bit Test, skip if set
Skip if R(b)=1 None
100nnn nnnnnnnn LCALL n Long CALL subroutine
n PC,
None
PC+1 Stack
101nnn nnnnnnnn LJUMP n Long JUMP to address
n PC
None
110111 iiiiiiii
ADDWI i Add immediate to W
W+i W
C,HC,Z
110001 iiiiiiii
RTWI i
Return, place immediate to W Stack PC,i
W
None
111000 iiiiiiii
SUBWI i Subtract W from immediate i-W W
C,HC,Z
010000 00001001 RTFI
Reture from interrupt
Note :
W
:
WT
:
TMODE :
CPIO :
TF
:
PF
:
PC
:
OSC :
Inclu. :
Exclu. :
AND
Working register
Watchdog timer
TMODE mode register
Control I/O port register
Timer overflow flag
Power loss flag
Program Counter
Oscillator
Inclusive ‘ ’
Exclusive ‘ ’
: Logic AND ‘ ’
b:
t:
0
1
R:
C:
HC :
Z:
/:
x:
I
Stack PC,1
GIS
None
Bit position
Target
: Working register
: General register
General register address
Carry flag
Half carry
Zero flag
Complement
Don’t care
: Immediate data ( 8 bits )
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
P.14
2005/5 Ver. 1.8