MX25R6435F Datasheet, PDF (6/89 Pages) Macronix International – Wide Vcc Range 64M-BIT [x 1/x 2/x 4] CMOS MXSMIO

PRELIMINARY
MX25R6435F
2. GENERAL DESCRIPTION
MX25R6435F is 64Mb bits serial Flash memory, which is configured as 8,388,608 x 8 internally. When it is in four I/
O mode, the structure becomes 16,777,216 bits x 4 or 33,554,432 bits x 2. MX25R6435F feature a serial peripheral
interface and software protocol allowing operation on a simple 3-wire bus while it is in single I/O mode. The three
bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial access to the
device is enabled by CS# input.
When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits
input and data output. When it is in four I/O read mode, the SI pin, SO pin, WP# pin and Reset# pin become SIO0
pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data output.
The MX25R6435F MXSMIO^® (Serial Multi I/O) provides sequential read operation on whole chip.
After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the
specified page or sector/block locations will be executed. Program command is executed on byte basis, or page (256
bytes) basis, or word basis for erase command is executed on sector (4K-byte) or block (32K-byte), or block (64K-byte),
or whole chip basis.
To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read
command can be issued to detect completion status of a program or erase operation via WIP bit.
Advanced security features enhance the protection and security functions, please see security features section for
more details.
The MX25R6435F utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after
100,000 program and erase cycles.
P/N: PM2138
REV. 0.03, JAN. 30, 2015
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