MX25U1635E Datasheet, PDF (5/87 Pages) Macronix International – 16M-BIT [x 1/x 2/x 4] 1.8V CMOS MXSMIO® (SERIAL MULTI I/O) FLASH MEMORY

MX25U1635E
Figure 50. Deep Power-down (DP) Sequence (Command B9) (SPI Mode)..................................................... 67
Figure 51. Deep Power-down (DP) Sequence (Command B9) (QPI Mode)..................................................... 67
Figure 52. RDP and Read Electronic Signature (RES) Sequence (Command AB) (SPI Mode)....................... 67
Figure 53. Release from Deep Power-down (RDP) Sequence (Command AB) (SPI Mode)............................ 68
Figure 54. Release from Deep Power-down (RDP) Sequence (Command AB) (QPI Mode)............................ 68
Figure 55. Read Electronic Manufacturer & Device ID (REMS) Sequence (Command 90) (SPI Mode only)... 69
Figure 56. Read Security Register (RDSCUR) Sequence (Command 2B) (SPI Mode).................................... 70
Figure 57. Read Security Register (RDSCUR) Sequence (Command 2B) (QPI Mode).................................... 70
Figure 58. Write Security Register (WRSCUR) Sequence (Command 2F) (SPI Mode).................................... 71
Figure 59. Write Security Register (WRSCUR) Sequence (Command 2F) (QPI Mode).................................... 71
Figure 60. Word Read Quad I/O (W4READ) Sequence (Command E7) (SPI Mode only, 84MHz)................... 72
Figure 61. Performance Enhance Mode Reset for Fast Read Quad I/O (SPI Mode)........................................ 72
Figure 62. Performance Enhance Mode Reset for Fast Read Quad I/O (QPI Mode)........................................ 73
Figure 63. Reset Sequence (SPI mode)............................................................................................................ 73
Figure 64. Reset Sequence (QPI mode)............................................................................................................ 73
Figure 65. Enable Quad I/O Sequence.............................................................................................................. 73
Figure 66. Suspend to Read Latency................................................................................................................. 74
Figure 67. Resume to Read Latency................................................................................................................. 74
Figure 68. Resume to Suspend Latency............................................................................................................ 74
Figure 69. Software Reset Recovery................................................................................................................. 74
Figure 70. Power-up Timing............................................................................................................................... 75
Table 16. Power-Up Timing and VWI Threshold................................................................................................ 75
12-1. Initial Delivery State.................................................................................................................................... 75
13. OPERATING CONDITIONS.................................................................................................................................. 76
Figure 71. AC Timing at Device Power-Up......................................................................................................... 76
Figure 72. Power-Down Sequence.................................................................................................................... 77
14. ERASE AND PROGRAMMING PERFORMANCE............................................................................................... 78
15. DATA RETENTION .............................................................................................................................................. 78
16. LATCH-UP CHARACTERISTICS......................................................................................................................... 78
17. ORDERING INFORMATION................................................................................................................................. 79
18. PART NAME DESCRIPTION................................................................................................................................ 80
19. PACKAGE INFORMATION................................................................................................................................... 81
20. REVISION HISTORY ............................................................................................................................................ 85
P/N: PM1472
REV. 1.9, NOV. 08, 2013
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