MX25L4005 Datasheet, PDF (34/41 Pages) Macronix International – 4M-BIT [x 1] CMOS SERIAL FLASH

MX25L4005
ERASE AND PROGRAMMING PERFORMANCE
PARAMETER
Write Status Register Cycle Time
Sector erase Time
Block erase Time
Chip Erase Time
Page Program Time
Erase/Program Cycle
Min.
100,000
TYP. (1)
5
60
1
3.5
1.4
Max. (2)
15
120
2
7.5
5
UNIT
ms
ms
s
s
ms
cycles
Note:
1. Typical program and erase time assumes the following conditions: 25° C, 3.3V, and checker board pattern.
2. Under worst conditions of 70° C and 3.0V.
3. System-level overhead is the time required to execute the first-bus-cycle sequence for the programming command.
4. The maximum chip programming time is evaluated under the worst conditions of 0C, VCC=3.0V, and 100K cycle with
90% confidence level.
LATCH-UP CHARACTERISTICS
Input Voltage with respect to GND on ACC
Input Voltage with respect to GND on all power pins, SI, CS#
Input Voltage with respect to GND on SO
Current
Includes all pins except VCC. Test conditions: VCC = 3.0V, one pin at a time.
MIN.
-1.0V
-1.0V
-1.0V
-100mA
MAX.
12.5V
2 VCCmax
VCC + 1.0V
+100mA
P/N: PM1236
REV. 1.1, SEP. 30, 2005
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