MX25U2033E Datasheet, PDF (30/68 Pages) Macronix International – 2M-BIT [x 1/x 2/x 4] 1.8V CMOS MXSMIO® (SERIAL MULTI I/O) FLASH MEMORY

MX25U2033E
Table 9. Security Register Definition
Bit7
Bit6
Bit5
WPSEL
E_FAIL
P_FAIL
0=normal
WP mode
1=individual
mode
(default=0)
0=normal
Erase
succeed
1=individual
Erase failed
(default=0)
Non-volatile
bit (OTP)
Volatile bit
0=normal
Program
succeed
1=indicate
Program
failed
(default=0)
Volatile bit
Bit4
Reserved
-
Volatile bit
Bit3
Reserved
-
Volatile bit
Bit2
Bit1
Bit0
Reserved
-
Volatile bit
LDSO
(indicate if
lock-down)
Secured OTP
indicator bit
0 = not lock-
down
0 = non-
1 = lock-down factory
(cannot
lock
program/ 1 = factory
erase
lock
OTP)
Non-volatile
bit
(OTP)
Non-volatile
bit (OTP)
9-23. Write Security Register (WRSCUR)
The WRSCUR instruction is for setting the values of Security Register Bits. The WREN (Write Enable) instruction is
required before issuing WRSCUR instruction. The WRSCUR instruction may change the values of bit1 (LDSO bit)
for customer to lock-down the 4K-bit Secured OTP area. Once the LDSO bit is set to "1", the Secured OTP area
cannot be updated any more. The LDSO bit is an OTP bit. Once the LDSO bit is set, the value of LDSO bit can not
be altered any more.
The sequence of issuing WRSCUR instruction is :CS# goes low→ sending WRSCUR instruction → CS# goes high.
(Please see "Figure 35. Write Security Register (WRSCUR) Sequence (Command 2F)".)
The CS# must go high exactly at the boundary; otherwise, the instruction will be rejected and not executed.
9-24. Write Protection Selection (WPSEL)
When the system accepts and executes WPSEL instruction, bit 7 in the security register will be set. The WREN (Write
Enable) instruction is required before issuing WPSEL instruction. It will activate SBLK, SBULK, RDBLOCK, GBLK,
GBULK etc instructions to conduct block lock protection and replace the original Software Protect Mode (SPM) use
(BP2~BP0) indicated block methods.
The sequence of issuing WPSEL instruction is: CS# goes low → sending WPSEL instruction to enter the individual
block protect mode→ CS# goes high.
Every time after the system is powered-on, the Security Register bit 7 is checked. If WPSEL=1, then all the blocks
and sectors will be write-protected by default. User may only unlock the blocks or sectors via SBULK and GBULK
instructions. Program or erase functions can only be operated after the Unlock instruction is executed.
Once WPSEL is set, it cannot be changed.
P/N: PM1743
REV. 1.3, NOV. 14, 2013
30