MX25V1006E Datasheet, PDF (3/45 Pages) Macronix International – 1M-BIT [x 1/x 2] CMOS SERIAL FLASH

MX25V1006E
POWER-ON STATE.................................................................................................................................................... 20
ELECTRICAL SPECIFICATIONS............................................................................................................................... 21
ABSOLUTE MAXIMUM RATINGS.................................................................................................................... 21
CAPACITANCE TA = 25°C, f = 1.0 MHz............................................................................................................ 21
Figure 5. INPUT TEST WAVEFORMS AND MEASUREMENT LEVEL............................................................. 22
Figure 6. OUTPUT LOADING.......................................................................................................................... 22
Table 5. DC CHARACTERISTICS ................................................................................................................... 23
Table 6. AC CHARACTERISTICS ................................................................................................................... 24
Table 7. Power-Up Timing................................................................................................................................. 25
INITIAL DELIVERY STATE............................................................................................................................... 25
Timing Analysis......................................................................................................................................................... 26
Figure 7. Serial Input Timing............................................................................................................................. 26
Figure 8. Output Timing..................................................................................................................................... 26
Figure 9. Hold Timing........................................................................................................................................ 27
Figure 10. WP# Disable Setup and Hold Timing during WRSR when SRWD=1.............................................. 27
Figure 11. Write Enable (WREN) Sequence (Command 06)............................................................................ 28
Figure 12. Write Disable (WRDI) Sequence (Command 04)............................................................................. 28
Figure 13. Read Identification (RDID) Sequence (Command 9F)..................................................................... 28
Figure 14. Read Status Register (RDSR) Sequence (Command 05)............................................................... 29
Figure 15. Write Status Register (WRSR) Sequence (Command 01).............................................................. 29
Figure 16. Read Data Bytes (READ) Sequence (Command 03)..................................................................... 29
Figure 17. Read at Higher Speed (FAST_READ) Sequence (Command 0B)................................................. 30
Figure 18. Dual Output Read Mode Sequence (Command 3B)........................................................................ 30
Figure 19. Page Program (PP) Sequence (Command 02).............................................................................. 31
Figure 20. Sector Erase (SE) Sequence (Command 20)................................................................................. 32
Figure 21. Block Erase (BE) Sequence (Command 52 or D8)......................................................................... 32
Figure 22. Chip Erase (CE) Sequence (Command 60 or C7).......................................................................... 33
Figure 23. Deep Power-down (DP) Sequence (Command B9)....................................................................... 33
Figure 24. Read Electronic Signature (RES) Sequence (Command AB)......................................................... 33
Figure 25. Release from Deep Power-down (RDP) Sequence (Command AB).............................................. 34
Figure 26. Read Electronic Manufacturer & Device ID (REMS) Sequence (Command 90)............................ 34
Figure 27. Power-up Timing.............................................................................................................................. 35
RECOMMENDED OPERATING CONDITIONS.......................................................................................................... 36
Figure 28. AC Timing at Device Power-Up........................................................................................................ 36
Figure 29. Power-Down Sequence................................................................................................................... 37
ERASE AND PROGRAMMING PERFORMANCE..................................................................................................... 38
DATA RETENTION..................................................................................................................................................... 38
LATCH-UP CHARACTERISTICS............................................................................................................................... 38
ORDERING INFORMATION....................................................................................................................................... 39
PART NAME DESCRIPTION...................................................................................................................................... 40
PACKAGE INFORMATION......................................................................................................................................... 41
REVISION HISTORY .................................................................................................................................................. 44
P/N: PM1752
REV. 1.3, NOV. 12, 2013
3