MX25L6435EMI-10G Datasheet, PDF (28/87 Pages) Macronix International – HIGH PERFORMANCE SERIAL FLASH SPECIFICATION

MX25L6435E
10-7. Read Data Bytes at Higher Speed (FAST_READ)
The FAST_READ instruction is for quickly reading data out. The address is latched on rising edge of SCLK, and
data of each bit shifts out on the falling edge of SCLK at a maximum frequency fC. The first address byte can be
at any location. The address is automatically increased to the next higher address after each byte data is shifted
out, so the whole memory can be read out at a single FAST_READ instruction. The address counter rolls over to
0 when the highest address has been reached.
The sequence of issuing FAST_READ instruction is: CS# goes low→ sending FAST_READ instruction code→
3-byte address on SI→1-dummy byte (default) address on SI→ data out on SO→ to end FAST_READ operation
can use CS# to high at any time during data out.
In the performance-enhancing mode, P[7:4] must be toggling with P[3:0] ; likewise P[7:0]=A5h,5Ah,F0h or 0Fh
can make this mode continue and reduce the next 4READ instruction. Once P[7:4] is no longer toggling with
P[3:0]; likewise P[7:0]=FFh,00h,AAh or 55h and afterwards CS# is raised and then lowered, the system then will
escape from performance enhance mode and return to normal operation.
While Program/Erase/Write Status Register cycle is in progress, FAST_READ instruction is rejected without any
impact on the Program/Erase/Write Status Register current cycle.
Figure 10. Read at Higher Speed (FAST_READ) Sequence (Command 0B) (104MHz)
CS#
SCLK
SI
SO
0 1 2 3 4 5 6 7 8 9 10 28 29 30 31
Command
24 BIT ADDRESS
0Bh
High-Z
23 22 21
3210
CS#
SCLK
SI
SO
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
Dummy Cycle
76543210
DATA OUT 1
DATA OUT 2
76543210765432107
MSB
MSB
MSB
P/N: PM1784
REV. 0.03, MAR. 12, 2012
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