MX25L1021E Datasheet, PDF (11/42 Pages) Macronix International – MX25L5121E

MX25L5121E
MX25L1021E
COMMAND DESCRIPTION
Table 3. Command Set
Command WREN (write WRDI (write
(byte)
enable)
disable)
1st byte
06 (hex)
04 (hex)
WRSR
RDID
RDSR
(write status (read identific- (read status
register)
ation)
register)
01 (hex)
9F (hex)
05 (hex)
2nd byte
3rd byte
4th byte
5th byte
Action
sets the (WEL) resets the to write new outputs to read out
write enable (WEL) write values of the JEDEC
the values
latch bit enable latch status register ID: 1-byte of the status
bit
Manufacturer register
ID & 2-bytes
Device ID
READ (read
data)
03 (hex)
AD1
(A23-A16)
AD2
(A15-A8)
AD3
(A7-A0)
n bytes read
out until CS#
goes high
FAST READ
(fast read
data)
0B (hex)
AD1
AD2
AD3
Dummy
n bytes read
out until CS#
goes high
Command
(byte)
1st byte
2nd byte
3rd byte
4th byte
Action
SE (sector
erase)
BE (block
erase)
CE (chip
erase)
PP (page
program)
20 (hex) 52 or D8 (hex) 60 or C7 (hex) 02 (hex)
AD1
AD1
AD1
AD2
AD2
AD2
AD3
AD3
AD3
to erase the to erase the to erase to program
selected
selected whole chip the selected
sector
block
page
DP (Deep
power down)
RDP (Release
from deep
power down)
B9 (hex)
AB (hex)
enters Deep release from
Power Down Deep Power
Mode
Down Mode
Note 1: It is not recommended to adopt any other code not in the command definition table, which will potentially
enter the hidden mode.
Note 2: Value "1" should be input to the un-used significant bits of address bits by user (e.g. A17~A23(MSB) in
MX25L1021E ; A16-A23(MSB) in MX25L5121E)
P/N: PM1573
REV. 1.3, NOV. 11, 2013
11