MX29F8100 Datasheet, PDF (1/37 Pages) Macronix International – 8M-BIT [1M x 8/512K x 16] CMOS SINGLE VOLTAGE FLASH MEMORY

INDEX
FEATURES
• 5V ± 10% write and erase
• JEDEC-standard EEPROM commands
• Endurance : 10,000 cycles
• Fast access time: 120/150ns
• Sector erase architecture
- 8 equal sectors of 128k bytes each
- Sector erase time: 50ms typical
• Auto Erase and Auto Program Algorithms
- Automatically erases any one of the sectors
or the whole chip with Erase Suspend capability
- Automatically programs and verifies data at
specified addresses
• Status Register feature for detection of program or erase
cycle completion
• Low VCC write inhibit < 3.2V
• Software and hardware data protection
PRELIMINARY
MX29F8100
8M-BIT [1M x 8/512K x 16] CMOS
SINGLE VOLTAGE FLASH MEMORY
• Page program operation
- Internal address and data latches for 128 bytes/64
words per page
- Page programming time: 3ms typical
- Byte programming time: 24us in average
• Low power dissipation
- 50mA active current
- 100uA standby current
• CMOS and TTL compatible inputs and outputs
• Two independently Protected sectors
• Deep Power-Down Current
- 1uA ICC typical
• Industry standard surface mount packaging
- 48 lead TSOP, TYPE I
- 44 lead SOP
GENERAL DESCRIPTION
The MX29F8100 is a 8-mega bit Flash memory organized
as either 512K wordx16 or 1M bytex8. The MX29F8100
includes 8-128KB(131,072) blocks or 8-64KW(65,536)
blocks. MXIC's Flash memories offer the most cost-
effective and reliable read/write non-volatile random
access memory. The MX29F8100 is packaged in 48-pin
TSOP or 44-pin SOP. For 48-pin TSOP, CE2 and RY/BY
are extra pins compared with 44-pin SOP package. This
is to optimize the products (such as solid-state disk drives
or flash memory cards) control pin budget. PWD is
available in 48 -pin TSOP for low power environment. All
the above three pins(CE2,RY/BY and PWD) plus one
extra VCC pin are not provided in 44-pin SOP. It is
designed to be reprogrammed and erased in-system or
in-standard EPROM programmers.
The standard MX29F8100 offers access times as fast as
100ns,allowing operation of high-speed microprocessors
without wait. To eliminate bus contention, the
MX29F8100 has separate chip enables(CE1 and CE2),
output enable (OE), and write enable (WE) controls.
MXIC's Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
MX29F8100 uses a command register to manage this
functionality. The command register allows for 100% TTL
level control inputs and fixed power supply levels during
erase and programming, while maintaining maximum
EPROM compatibility.
To allow for simple in-system reprogrammability, the
MX29F8100 does not require high input voltages for
programming. Five-volt-only commands determine the
operation of the device. Reading data out of the device
is similar to reading from an EPROM.
MXIC Flash technology reliably stores memory contents
even after 10,000 cycles. The MXIC's cell is designed to
optimize the erase and programming mechanisms. In
addition, the combination of advanced tunnel oxide
processing and low internal electric fields for erase and
programming operations produces reliable cycling. The
MX29F8100 uses a 5V ± 10% VCC supply to perform the
Auto Erase and Auto Program algorithms.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up
protection is proved for stresses up to 100 milliamps on
address and data pin from -1V to VCC +1V.
P/N: PM0262
1
REV.2.0, JAN. 22, 1999